Reading the STATUSC register returns the peripheral write protection status of the
indicated peripherals:
0 Peripheral is not write protected.
1 Peripheral is write protected.
Table 15-12. Register Bit Attribute
Legend
Symbol
Description
Symbol
Description
Symbol
Description
R
Readable bit
HC
Cleared by Hardware
(Grey cell)
Unimplemented
W
Writable bit
HS
Set by Hardware
X
Bit is unknown at Reset
K
Write to clear
S
Software settable bit
—
—
Name:
STATUSC
Offset:
0x3C
Reset:
0x000000
Property:
-
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
USB
TRNG
Access
R/W
R/W
Reset
0
0
Bit
15
14
13
12
11
10
9
8
ETH
PDEC
CCL
SPI_IXS
PTC
AC
ADC
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
TCC7
TCC6
TCC5
TCC4
SERCOM7
SERCOM6
SERCOM5
SERCOM4
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit 17 – USB Universal Serial
Bus
Bit 16 – TRNG True Random Number Generator
Bit 15 – ETH Ethernet
Bit 14 – PDEC Position Decoder
Bit 13 – CCL Configurable Custom Logic
Bit 11 – SPI_IXS Inter-IC Sound
Interface
Bit 10 – PTC Peripheral Touch
Controller
Bit 9 – AC Analog
Comparator
Bit 8 – ADC Analog-to-Digital
Converter
Bits 4, 5, 6, 7 – TCCn Timer Counter Controller n, n =
4..7
Bits 0, 1, 2, 3 – SERCOMn Serial Communication Interface n, n =
4..7
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
