18.7.10 DFLL Tune

Table 18-13. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: DFLLTUNE
Offset: 0x34
Reset: 0x00000000
Property: PACWrite-Protection, Write-Synchronized, Read-Synchronized

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
  TUNE[6:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bits 6:0 – TUNE[6:0] DFLL48M Tune Value

Sets the value of the Tune Calibration register.

Note: In closed-loop mode, this field is read-only.
Step TUNE[6:0] % Delta/step
+63 0b011 1111 +9.45%
••• ••• •••
+1 0b000 0001 +0.15%
0 0b000 0000 / 0b111 1111 0%
-1 0b111 1110 -0.15%
••• ••• •••
-63 0b100 0000 -9.45%
Note:
  1. % Delta value is rounded to two decimal places.