15.2 Architectural Overview
The oscillator module is based on a number of clock generators (CLKGENs) and PLL generators (PLLGENs). The CLKGENs are preassigned to the CPU and peripherals. Some of the CLKGENs are shared by more than one consumer. Each clock generator selects a clock source from the available oscillators or PLLs and passes it to a selectable divider circuit. The CLKGENs utilize a change request mechanism to prevent unintentional modifications. After the settings are written, a change request bit is set, and when clear, the operation is complete. In the event of a clock failure, the backup clock source is then used by the CLKGEN.
The Oscillator has the following main functions/modules:
- Multiple Clock Generators, Each
With:
- Selectable clock source
- A backup clock source
- Fail safe clock monitors
- Multiple PLLs, Each With:
-
- Selectable clock source
- A backup clock source
- PLL FOUT primary divider output
- PLL VCO secondary divider output
- Fail safe clock monitors
- Clock Monitor Module That
Compares Clock Against Reference Clock:
- Clock failure detection
- Clock frequency drift detection
- Selectable threshold limits for warning and/or failing
- Fault injection capability
- Frequency, pulse width and duty cycle measurements
A high level block diagram of the PIC32A oscillator system is shown in Figure 15-1.