23.2 Architectural Overview

The I²C bus is a 2-wire serial interface. Figure 23-1 illustrates the schematic of an I²C connection between a PIC32AK1216GC41064 device and a 24LC256 I²C serial EEPROM, which is a typical example for any I²C interface.

The I²C interface uses a comprehensive protocol to ensure reliable transmission and reception of the data. When communicating, one device acts as the “host” and initiates transfer on the bus and generates the clock signals to permit that transfer, while the other devices act as the “client” responding to the transfer. The clock line, SCLx, is output from the host and input to the client, although occasionally the client drives the SCLx line. The data line, SDAx, may be output and input from both the host and client.

Because the SDAx and SCLx lines are bidirectional, the output stages of the devices driving the SDAx and SCLx lines must have an open-drain in order to perform the wired-AND function of the bus. External pull-up resistors are used to ensure a high level when no device is pulling the line down.

In the I²C interface protocol, each device has an address. When a host needs to initiate a data transfer, it first transmits the address of the device that it wants to “communicate”. All of the devices “listen” to see if this is their address. Within this address, bit 0 specifies whether the host wants to read from or write to the client device. The host and client are always in opposite modes (Transmitter or Receiver) of operation during a data transfer. That is, they operate in either of the following two relationships:

In both cases, the host originates the SCLx clock signal.