26.6.1 Timer Operation in Sleep Mode

As the device enters Sleep mode, the System Clock and peripheral clock are disabled.

The Timer can operate asynchronously from an external clock source. Therefore, the Timer module can continue to operate during Sleep mode.

To operate in Sleep mode, the Timer module is configured as follows:

• Timer module is enabled, ON bit (TxCON[15]) = 1
• Timer clock source is selected as external, TCS bit (TxCON[1]) = 1
• TSYNC bit (TxCON[2]) is set to a logic ‘0’ (Asynchronous Counter mode enabled)

When these conditions are met, Timer continues to count and detect period matches when the device is in Sleep mode. When a match between the timer and the period register occurs, the TxIF status bit is set. If the TxIE bit is set, and its priority is greater than the current CPU priority, the device wakes from Sleep or Idle mode and executes the Timer Interrupt Service Routine.

If the assigned priority level of the Timer interrupt is less than or equal to the current CPU priority level, the CPU is not awakened and the device enters Idle mode.