28.5.8 Interrupt Control A

Writing a ‘1’ to any bit in this register enables the corresponding interrupt in the Interrupt Flags A (INTFLAGSA) register.

Writing a ‘0’ to any bit in this register disables the corresponding interrupt in INTFLAGSA.

Name:	INTCTRLA
Offset:	0x7
Reset:	0x00


Bit	7	6	5	4	3	2	1	0
	SOF	SUSPEND	RESUME	RESET	STALLED	UNF	OVF
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0

Bit 7 – SOF Start-of-Frame Interrupt Enable

Bit 6 – SUSPEND Suspend Interrupt Enable

Bit 5 – RESUME Resume Interrupt Enable

Bit 4 – RESET Reset Interrupt Enable

Bit 3 – STALLED STALL Interrupt Enable

Bit 2 – UNF Underflow Interrupt Enable

Bit 1 – OVF Overflow Interrupt Enable

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