28.5.10 Interrupt Flags A
| Name: | INTFLAGSA |
| Offset: | 0x9 |
| Reset: | 0x00 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SOF | SUSPEND | RESUME | RESET | STALLED | UNF | OVF | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – SOF Start-of-Frame Interrupt Flag
This flag is set when a Start-of-Frame packet has been received.
Writing a ‘1’ to this bit will clear this flag.
Bit 6 – SUSPEND Suspend Interrupt Flag
This flag is set when the bus has been idle for 3 ms.
Writing a ‘1’ to this bit will clear this flag.
Bit 5 – RESUME Resume Interrupt Flag
This flag is set when a non-idle state has been detected on the bus while the USB peripheral is in the suspend state. This flag is set both in upstream and downstream resume. This interrupt is asynchronous and can wake the CPU from sleep modes where the system clock is stopped, such as Standby sleep mode.
Writing a ‘1’ to this bit will clear this flag.
Bit 4 – RESET Reset Interrupt Flag
This flag is set when a reset condition has been detected on the bus.
Writing a ‘1’ to this bit will clear this flag.
Bit 3 – STALLED STALL Interrupt Flag
This flag is set when the USB peripheral has responded with a STALL handshake to
either an IN or an OUT transaction. The flag is cleared by writing this bit to
‘1’.
Bit 2 – UNF Underflow Interrupt Flag
This flag is set when the addressed endpoint in an IN transaction does not have
data to send to the host. The flag is cleared by writing this bit to
‘1’.
Bit 1 – OVF Overflow Interrupt Flag
This flag is set when the addressed endpoint in an OUT transaction is not ready
to accept data from the host. The flag is cleared by writing this bit to
‘1’.