4.6.3 I2C Timing
The following figure illustrates the I2C client timing.
The following table provides I2C client timing parameters.
Parameter | Symbol | Min | Max | Units | Remarks |
---|---|---|---|---|---|
SCL Clock Frequency | fSCL | 0 | 400 | kHZ | — |
SCL Low Pulse Width | tWL | 1.3 | — | µs | — |
SCL High Pulse Width | tWH | 0.6 | — | µs | — |
SCL, SDA Fall Time | tHL | — | 300 | ns | — |
SCL, SDA Rise Time | tLH | — | 300 | ns | This is dictated by external components |
START Setup Time | tSUSTA | 0.6 | — | µs | — |
START Hold Time | tHDSTA | 0.6 | — | µs | — |
SDA Setup Time | tSUDAT | 100 | — | ns | — |
SDA Hold Time | tHDDAT | 0 | — | ns | Client and Host Default Host Programming Option |
40 | — | ns | |||
STOP Setup Time | tSUSTO | 0.6 | — | µs | — |
Bus Free Time Between STOP and START | tBUF | 1.3 | — | µs | — |
Glitch Pulse Reject | tPR | 0 | 50 | ns | — |