15.10.5 Analog-to-Digital Converter (ADC) Characteristics

Table 15-20. Operating Conditions
Symbol	Parameters	Conditions	Min.	Typ.	Max.	Unit
RES	Resolution	-	-	-	12	bits
	Conversion speed	-	10	-	1000	ksps
fs	Sampling clock	-	10	-	1000	kHz
clk	ADC Clock frequency	-	-	fs.16	-	Hz
T_S	Sampling time	OFFCOMP=1	250	-	25000	ns
	Conversion range	Diff mode	-V_REF	-	V_REF	V
	Conversion range	Single-Ended mode	0	-	V_REF	V
V_REF	Reference input	REFCOMP=1	1	-	V_DDANA-0.6	V
V_REF	Reference input	REFCOMP=0	V_DDANA	-	V_DDANA	V
V_IN	Input channel range	-	0	-	V_DDANA	V
V_CMIN	Input common mode voltage	For V_REF > 1.0V	0.7	-	V_REF-0.7	V
V_CMIN	Input common mode voltage	For V_REF=1.0V	0.3	-	V_REF-0.3	V
CSAMPLE⁽¹⁾	Input sampling capacitance	-	-	2.8	3.2	pF
RSAMPLE⁽¹⁾	Input sampling on-resistance	-	-	-	1715	Ω
Rref⁽¹⁾	Reference input source resistance	REFCOMP=1	-	-	5	kΩ

Note:

These values are based on simulation. They are not covered by production test limits or characterization.

Table 15-21. Power Consumption⁽¹⁾
Symbol	Parameters	Conditions	Ta	Min.	Typ.	Max.	Unit
I_DDANA	Differential Mode	fs=1Msps / Reference buffer disabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=V_REF=1.6V	Max.85°C Typ.25°C	-	105	128	µA
	Differential Mode	fs=1Msps / Reference buffer disabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=V_REF=3.6V		-	279	307	µA
	Differential Mode	fs=1Msps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=1.6V, V_REF=1.0V		-	175	231	µA
		fs=1Msps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=3.0V, V_REF=2.0V		-	300	374
		fs=1Msps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=3.6V, V_REF=3.0V		-	356	438
	Differential Mode	fs=10ksps / Reference buffer disabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=V_REF=1.6V		-	30	41	µA
	Differential Mode	fs=10ksps / Reference buffer disabled BIASREFBUF='111', BIASCOMP='111' V_CC=V_REF=3.6V		-	53	71	µA
	Differential Mode	fs=10ksps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=1.6V, V_REF=1.0V		-	95	139	µA
		fs=10ksps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=3.0V, V_REF=2.0V		-	115	178
		fs=10ksps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=3.6V, V_REF=3.0V		-	122	187
I_DDANA	Single-Ended Mode	fs=1Msps / Reference buffer disabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=V_REF=1.6V	Max.85°C Typ.25°C	-	138	158	µA
	Single-Ended Mode	fs=1Msps / Reference buffer disabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=V_REF=3.6V		-	321	359	µA
	Single-Ended Mode	fs=1Msps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=1.6V, V_REF=1.0V		-	203	257	µA
		fs=1Msps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=3.0V, V_REF=2.0V		-	331	413
		fs=1Msps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=3.6V, V_REF=3.0V		-	388	482
	Single-Ended Mode	fs=10ksps / Reference buffer disabled BIASREFBUF='111', BIASCOMP='111' V_CC=V_REF=1.6V		-	46	62	µA
	Single-Ended Mode	fs=10ksps / Reference buffer disabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=V_REF=3.6V		-	89	120	µA
	Single-Ended Mode	fs=10ksps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_CC=1.6V, V_REF=1.0V		-	109	157	µA
		fs=10ksps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=3.0V, V_REF=2.0V		-	138	211
		fs=10ksps / Reference buffer enabled BIASREFBUF='111', BIASCOMP='111' V_DDANA=3.6V, V_REF=3.0V		-	148	228

Note: 1. These values are based on characterization.

Table 15-22. Differential Mode⁽¹⁾
Symbol	Parameters	Conditions	Min.	Typ.	Max.	Unit
ENOB	Effective Number of bits	V_DDANA=3.0V / V_ref =2.0V	9.6	10.5	10.6	bits
		V_DDANA=1.6V/3.6V V_ref=1.0V	8.9	9.7	9.9
		V_DDANA=V_ref=1.6V	10	10.5	11.1
		V_DDANA=V_ref=3.6V	10.5	10.9	11.0
TUE	Total Unadjusted Error	V_DDANA=3.0V, V_ref=2.0V	-	7.5	11	LSB
INL	Integral Non Linearity	V_DDANA=3.0V, V_ref=2.0V	-	+/-1.5	+/-2.1	LSB
DNL	Differential Non Linearity	V_DDANA=3.0V, V_ref=2.0V	-	+/-0.8	+1.1/-1.0	LSB
	Gain Error	External Reference voltage 1.0V	-	+/-0.7	+/-1.5	%
		External Reference voltage 3.0V	-	+/-0.2	+/-0.5
		Reference bandgap voltage	-	+/-0.4	+/-4.4
		VDDANA	-	+/-0.1	+/-0.4
		VDDANA/2	-	+/-0.4	+/-1.3
		VDDANA/1.6	-	+/-0.3	+/-0.9
	Offset Error	External Reference voltage 1.0V	-	+/-1.1	+/-2.4	mV
		External Reference voltage 3.0V	-	+/-1.1	+/-3
		Reference bandgap voltage	-	+/-2.3	+/-7.5
		VDDANA	-	+/-0.9	+/-2.9
		VDDANA/2	-	+/-1	+/-2.6
		VDDANA/1.6	-	+/-1	+/-2.9
SFDR	Spurious Free Dynamic Range	Fs=1MHz / Fin=13 kHz / Full range Input signal V_DDANA=3.0V, V_ref=2.0V	68	75	77	dB
SINAD	Signal to Noise and Distortion ratio		60	65	66
SNR	Signal to Noise ratio		61	66	67
THD	Total Harmonic Distortion		-74	-73	-67
	Noise RMS	External Reference voltage	-	1.0	2.5	mV

Note: 1. These values are based on characterization.

Table 15-23. Single-Ended Mode⁽¹⁾
Symbol	Parameters	Conditions	Min.	Typ.	Max.	Unit
ENOB	Effective Number of bits	V_DDANA=3.0V / V_ref =2.0V	8.5	9.5	9.8	bits
		V_DDANA=1.6V/3.6V V_ref=1.0V	7.5	8.7	8.9
		V_DDANA=V_ref=1.6V ⁽²⁾	9.0	9.5	9.8
		V_DDANA=V_ref=3.6V	9.2	9.8	9.9
TUE	Total Unadjusted Error	V_DDANA=3.0V, V_ref=2.0V	-	17.4	31	LSB
INL	Integral Non Linearity	V_DDANA=3.0V, V_ref=2.0V	-	+/-2.2	+/-10.1	LSB
DNL	Differential Non Linearity	V_DDANA=3.0V, V_ref=2.0V	-	+/-0.8	+/-0.9	LSB
	Gain Error	External Reference voltage 1.0V	-	+/-1	+/-1.3	%
		External Reference voltage 3.0V	-	+/-0.3	+/-0.6
		Reference bandgap voltage	-	+/-0.4	+/-3.2
		V_ref=V_DDANA ⁽²⁾	-	+/-0.1	+/-0.3
		V_ref=V_DDANA/2	-	+/-0.6	+/-1.4
		V_ref=V_DDANA/1.6	-	+/-0.4	+/-1
	Offset Error	External Reference voltage 1.0V	-	+/-3.4	+/-13	mV
		External Reference voltage 3.0V	-	+/-3.6	+/-24
		Reference bandgap voltage	-	+/-1	+/-14
		V_ref=V_DDANA ⁽²⁾	-	+/-4.2	+/-25
		V_ref=V_DDANA/2	-	+/-5.7	+/-10
		V_ref=V_DDANA/1.6	-	+/-6.3	+/-13
SFDR	Spurious Free Dynamic Range	Fs=1MHz / Fin=13kHz / Full range Input signal V_DDANA=3.0V, V_ref=2.0V	65	71	78	dB
SINAD	Signal to Noise and Distortion ratio		53	59	61
SNR	Signal to Noise ratio		53	59	61
THD	Total Harmonic Distortion		-76	-70	-64
	Noise RMS	External Reference voltage	-	2.0	7.0	mV

Note:

These values are based on characterization.
All parameters given above exclude the corner V_DDANA = V_ref = 1.6V, Ta = -40°C.

The minimum sampling time t_samplehold for a given R_source can be found using this formula:

t_{samplehold} \geq (R_{sample} + R_{source}) \times C_{sample} \times (n + 2) \times \ln (2)

For 12-bit accuracy:

t_{samplehold} \geq (R_{sample} + R_{source}) \times C_{sample} \times 9.7

where $t_{samplehold} \geq \frac{1}{2 \times f_{ADC}}$ .