46.10.17 USART Channel Status Register (LON_MODE)

This configuration is relevant only if USART_MODE = 0x9 in the USART Mode Register.

Name: FLEX_US_CSR (LON_MODE)
Offset: 0x214
Reset: 
Property: Read-only

Bit 3130292827262524 
    LBLOVFELRXDLFETLCOLLTXD 
Access RRRRR 
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
      UNRETXEMPTY  
Access RR 
Reset  
Bit 76543210 
 LCRCELSFEOVRE   TXRDYRXRDY 
Access RRRRR 
Reset  

Bit 28 – LBLOVFE LON Backlog Overflow Error

ValueDescription
0 No backlog overflow error occurred since the last RSTSTA command was issued.
1 At least one backlog error overflow occurred since the last RSTSTA command was issued.

Bit 27 – LRXD LON Reception End Flag

ValueDescription
0 Reception on going or no reception occurred since the last RSTSTA command was issued.
1 At least one reception has been performed since the last RSTSTA command was issued.

Bit 26 – LFET LON Frame Early Termination

ValueDescription
0 No frame has been terminated early due to collision detection since the last RSTSTA command was issued.
1 At least one transmission has been terminated due to collision detection since the last RSTSTA command was issued. (This stops the DMA until reset with RSTSTA bit).

Bit 25 – LCOL LON Collision Detected Flag

ValueDescription
0 No collision occurred while transmitting since the last RSTSTA command was issued.
1 At least one collision occurred while transmitting since the last RSTSTA command was issued.

Bit 24 – LTXD LON Transmission End Flag

ValueDescription
0 Transmission on going or no transmission occurred since the last RSTSTA command was issued.
1 At least one transmission has been performed since the last RSTSTA command was issued.

Bit 10 – UNRE Underrun Error

ValueDescription
0 No LON underrun error has occurred since the last RSTSTA command was issued.
1 At least one LON underrun error has occurred since the last RSTSTA command was issued.

Bit 9 – TXEMPTY Transmitter Empty (cleared by writing FLEX_US_THR)

ValueDescription
0 There are characters in either FLEX_US_THR or the Transmit Shift Register, or the transmitter is disabled.
1 There are no characters in FLEX_US_THR, nor in the Transmit Shift Register.

Bit 7 – LCRCE LON CRC Error

ValueDescription
0 No CRC error has been detected since the last RSTSTA command was issued.
1 At least one CRC error has been detected since the last RSTSTA command was issued.

Bit 6 – LSFE LON Short Frame Error

ValueDescription
0 No short frame received since the last RSTSTA command was issued.
1 At least one short frame received since the last RSTSTA command was issued.

Bit 5 – OVRE Overrun Error

ValueDescription
0 No overrun error has occurred since the last RSTSTA command was issued.
1 At least one overrun error has occurred since the last RSTSTA command was issued.

Bit 1 – TXRDY Transmitter Ready (cleared by writing FLEX_US_THR)

ValueDescription
0 A character in FLEX_US_THR is waiting to be transferred to the Transmit Shift Register, or the transmitter is disabled. As soon as the transmitter is enabled, TXRDY becomes 1.
1 There is no character in FLEX_US_THR.

Bit 0 – RXRDY Receiver Ready (cleared by reading FLEX_US_RHR)

ValueDescription
0 No complete character has been received since the last read of FLEX_US_RHR or the receiver is disabled. If characters were being received when the receiver was disabled, RXRDY changes to 1 when the receiver is enabled.
1 At least one complete character has been received and FLEX_US_RHR has not yet been read.