46.10.18 USART Receive Holding Register (Default Mode)
If FIFO is enabled (FLEX_US_CR.FIFOEN=1), a byte access on FLEX_SPI_TDR reads one byte (FLEX_US_RHR.MODE9=0), see FIFO Single Data Access for details.
| Name: | FLEX_US_RHR (DEFAULT_MODE) |
| Offset: | 0x218 |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| RXSYNH | RXCHR[8] | ||||||||
| Access | R | R | |||||||
| Reset | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RXCHR[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 15 – RXSYNH Received Sync
| Value | Description |
|---|---|
| 0 | Last character received is a data. |
| 1 | Last character received is a command. |
Bits 8:0 – RXCHR[8:0] Received Character
Last character received if RXRDY is set.