46.10.31 USART LIN Mode Register
This register is relevant only if USART_MODE = 0xA or 0xB in the USART Mode Register.
| Name: | FLEX_US_LINMR |
| Offset: | 0x254 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| SYNCDIS | PDCM | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| DLC[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WKUPTYP | FSDIS | DLM | CHKTYP | CHKDIS | PARDIS | NACT[1:0] | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 17 – SYNCDIS Synchronization Disable
| Value | Description |
|---|---|
| 0 |
The synchronization procedure is performed in LIN client node configuration. |
| 1 |
The synchronization procedure is not performed in LIN client node configuration. |
Bit 16 – PDCM DMA Mode
| Value | Description |
|---|---|
| 0 |
The LIN mode register FLEX_US_LINMR is not written by the DMA. |
| 1 |
The LIN mode register FLEX_US_LINMR (excepting that flag) is written by the DMA. |
Bits 15:8 – DLC[7:0] Data Length Control
| Value | Description |
|---|---|
| 0–255 |
Defines the response data length if DLM = 0, in that case the response data length is equal to DLC+1 bytes. |
Bit 7 – WKUPTYP Wake-up Signal Type
| Value | Description |
|---|---|
| 0 |
Setting the LINWKUP bit in the control register sends a LIN 2.0 wake-up signal. |
| 1 |
Setting the LINWKUP bit in the control register sends a LIN 1.3 wake-up signal. |
Bit 6 – FSDIS Frame Slot Mode Disable
| Value | Description |
|---|---|
| 0 |
The Frame Slot mode is enabled. |
| 1 |
The Frame Slot mode is disabled. |
Bit 5 – DLM Data Length Mode
| Value | Description |
|---|---|
| 0 |
The response data length is defined by the DLC field of this register. |
| 1 |
The response data length is defined by the bits 5 and 6 of the identifier (FLEX_US_LINIR.IDCHR). |
Bit 4 – CHKTYP Checksum Type
| Value | Description |
|---|---|
| 0 |
LIN 2.0 “enhanced” checksum |
| 1 |
LIN 1.3 “classic” checksum |
Bit 3 – CHKDIS Checksum Disable
| Value | Description |
|---|---|
| 0 |
In host node configuration, the checksum is computed and sent automatically. In client node configuration, the checksum is checked automatically. |
| 1 |
Whatever the node configuration is, the checksum is not computed/sent and it is not checked. |
Bit 2 – PARDIS Parity Disable
| Value | Description |
|---|---|
| 0 |
In host node configuration, the identifier parity is computed and sent automatically. In host node and client node configuration, the parity is checked automatically. |
| 1 |
Whatever the node configuration is, the Identifier parity is not computed/sent and it is not checked. |
Bits 1:0 – NACT[1:0] LIN Node Action
Values which are not listed in the table must be considered as “reserved”.
| Value | Name | Description |
|---|---|---|
| 0 | PUBLISH |
The USART transmits the response. |
| 1 | SUBSCRIBE |
The USART receives the response. |
| 2 | IGNORE |
The USART does not transmit and does not receive the response. |