28.7.16 Non-secure Interrupt
Important: This register is only available for
PIC32CM LS00/LS60 and has no effect for
PIC32CM LE00.
Name: | NONSEC |
Offset: | 0x40 |
Reset: | 0x00000000 |
Property: | PAC Write-Protection, Write-Secure |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
NMI | |||||||||
Access | RW/R/RW | ||||||||
Reset | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
EXTINT15 | EXTINT14 | EXTINT13 | EXTINT12 | EXTINT11 | EXTINT10 | EXTINT9 | EXTINT8 | ||
Access | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
EXTINT7 | EXTINT6 | EXTINT5 | EXTINT4 | EXTINT3 | EXTINT2 | EXTINT1 | EXTINT0 | ||
Access | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | RW/R/RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 31 – NMI Non-Secure Non-Maskable Interrupt
This bit enables the non-secure mode of NMI.
The registers whose content is set in non-secure mode by NONSEC.NMI are NMICTRL and NMIFLAG registers.
Value | Description |
---|---|
0 | NMI is secure. |
1 | NMI is non-secure. |
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 – EXTINT Non-Secure External Interrupt
The bit x of EXTINT enables the non-secure mode of EXTINTx.
The registers whose EXTINT bit or bitfield x is set in non-secure mode by NONSEC.EXTINTx are EVCTRL, ASYNCH, IDEBOUNCEN, NTENCLR, INTENSET, INTFLAG and CONFIG registers.
Value | Description |
---|---|
0 | EXTINTx is secure. |
1 | EXTINTx is non-secure. |