50.3 MCU Active Current Consumption

Table 50-4. MCU Active Current Consumption Electrical Specifications^{(1, 2, 3, 4)}
DC CHARACTERISTICS				Standard Operating Conditions: VDD = AVDD = 1.62V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +125°C for Extended Temp
Param. No.	Symbol	Characteristics	Clock/Freq	Typ.	Max.	Units	Conditions
APWR_1	I_{DD_ACTIVE}	Current consumption in Active mode (LDO mode)	FDPLL96M = 12 MHz (48 MHz/4)	120	218	µA/MHz	VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL0
APWR_2			FDPLL96M = 12 MHz (48 MHz/4)	119	214		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL0
APWR_3			DFLLULP = 12 MHz	88	201		VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL0
APWR_4			DFLLULP = 12 MHz	88	197		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL0
APWR_5			OSC16M = 12 MHz	93	188		VDD = AVDD = 3.3V XOSC32K OFF Performance Level Mode = PL0
APWR_6			OSC16M = 12 MHz	91	186		VDD = AVDD = 1.8V XOSC32K OFF Performance Level Mode = PL0
APWR_7			OSC16M = 4 MHz	106	392		VDD = AVDD = 3.3V XOSC32K OFF Performance Level Mode = PL0
APWR_8			OSC16M = 4 MHz	103	389		VDD = AVDD = 1.8V XOSC32K OFF Performance Level Mode = PL0
APWR_9	I_{DD_ACTIVE}	Current consumption in Active mode (LDO mode)	FDPLL96M = 48 MHz	114	144	µA/MHz	VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_10			FDPLL96M = 48 MHz	114	143		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_11			DFLL48M = 48 MHz	111	139		VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_12			DFLL48M = 48 MHz	110	138		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_13			DFLLULP = 32 MHz	109	170		VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_14			DFLLULP = 32 MHz	109	169		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_15		Current consumption in Active mode (BUCK mode)	FDPLL96M = 12 MHz (48 MHz/4)	63	131		VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL0
APWR_16			FDPLL96M = 12 MHz (48 MHz/4)	85	152		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL0
APWR_17			DFLLULP = 12 MHz	38	108		VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL0
APWR_18			DFLLULP = 12 MHz	58	132		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL0
APWR_19	I_{DD_ACTIVE}	Current consumption in Active mode (BUCK mode)	OSC16M = 12 MHz	41	103	µA/MHz	VDD = AVDD = 3.3V XOSC32K OFF Performance Level Mode = PL0
APWR_20			OSC16M = 12 MHz	61	124		VDD = AVDD = 1.8V XOSC32K OFF Performance Level Mode = PL0
APWR_21			OSC16M = 4 MHz	52	206		VDD = AVDD = 3.3V XOSC32K OFF Performance Level Mode = PL0
APWR_22			OSC16M = 4 MHz	70	263		VDD = AVDD = 1.8V XOSC32K OFF Performance Level Mode = PL0
APWR_23			FDPLL96M = 48 MHz	58	131		VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_24			FDPLL96M = 48 MHz	89	218		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_25			DFLL48M = 48 MHz	54	126		VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_26			DFLL48M = 48 MHz	86	221		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_27			DFLLULP = 32 MHz	52	135		VDD = AVDD = 3.3V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
APWR_28			DFLLULP = 32 MHz	83	225		VDD = AVDD = 1.8V XOSC32K @ 32.768 kHz Performance Level Mode = PL2
Note: Typical values at 25°C only. Conditions: No peripheral modules are operating (i.e., all peripherals inactive) NVM Cache enabled All clock generation sources disabled unless otherwise specified (i.e., XOSC32 = Off...) All I/O pins are tri-stated with input buffers disabled WDT, RTC, CFD Clock Fail Detection disabled RESET = VDD Note: µA/MHz varies over temperature. Worst case is given by maximum. CPU Running CoreMark® Test Suite. For the PIC32CM LS60 MCUs, the current consumption of the ATECC608B is not taken into account and must be added. Refer to the "ATECC608B-TFLXTLS CryptoAuthentication™ Data Sheet" (DS40002138) for additional information.

Figure 50-1. Typical Power Consumption over Temperature in Active Mode (PL0 at 12 MHz)

Figure 50-2. Power Consumption over Temperature in Active Mode (PL2 at 48 MHz)