44.10.5 Analog-to-Digital (ADC) Characteristics

Table 44-23. Operating Conditions
Symbol	Parameters	Conditions		Min.	Typ.	Max.	Unit
RES	Resolution			-	-	12	bits
R_S	Sampling rate			10	-	1000	kSPS
fs	Sampling clock			10	-	1000	kHz
	Differential mode Number of ADC clock cycles SAMPCTRL.OFFCOMP=1	resolution 12bit (RESEL=0)			16		cycles
		resolution 10bit (RESEL = 2)			14
		resolution 8bit (RESEL = 3)			12
	Differential mode Number of ADC clock cycles SAMPCTRL.OFFCOMP=0	SAMLPLEN corresponds to the decimal value of the SAMPLEN[5:0] register	resolution 12bit (RESEL = 0)		SAMPLEN + 13		cycles
			resolution 10bit (RESEL = 2)		SAMPLEN + 11
			resolution 8bit (RESEL=3)		SAMPLEN + 9
	Single-ended mode Number of ADC clock cycles SAMPCTRL.OFFCOMP = 1	resolution 12bit (RESEL = 0)			16		cycles
		resolution 10bit (RESEL = 2)			15
		resolution 8bit (RESEL = 3)			13
	Single-ended mode Number of ADC clock cycles SAMPCTRL.OFFCOMP = 0	SAMLPLEN corresponds to the decimal value of the SAMPLEN[5:0] register	resolution 12bit (RESEL = 0)		SAMPLEN + 13		cycles
			resolution 10bit (RESEL = 2)		SAMPLEN + 12
			resolution 8bit (RESEL = 3)		SAMPLEN + 10
fadc	ADC Clock frequency			160	-	16000	kHz
T_S	Sampling time			250	(SAMPLEN+1)/fadc	25000	ns
	Conversion range	Differential mode		-V_REF	-	V_REF	V
	Conversion range	Single-Ended mode		0	-	V_REF	V
V_REF	Reference input	REFCOMP = 1		1	-	V_DDANA-0.6	V
V_REF	Reference input	REFCOMP = 0		V_DDANA	-	V_DDANA	V
V_IN	Input channel range	-		0	-	V_DDANA	V
V_CMIN	Input common mode voltage	For V_REF > 1.0V		0.7	-	V_REF-0.7	V
V_CMIN	Input common mode voltage	For V_REF=1.0V		0.3	-	V_REF-0.3	V
CSAMPLE⁽¹⁾	Input sampling capacitance	-		-	2.8	3.2	pF
RSAMPLE⁽¹⁾	Input channel source resistance	-		-	-	1715	Ω
R_ref⁽¹⁾	Reference input source resistance	REFCOMP = 1		-	-	5	kΩ

Note:

These values are based on simulation. They are not covered by production test limits or characterization.

Table 44-24. Power Consumption⁽¹⁾
Symbol	Parameters	Conditions		Ta	Min.	Typ.	Max.	Unit
I_{DD_VDDANA}⁽¹⁾	Differential Mode	fs = 1 MSPS / Reference buffer disabled / BIASREFBUF = '111', BIASREFCOMP = '111'	V_DDANA = V_REF = 1.6V	Max.85°C Typ.25°C	-	105	128	µA
			V_DDANA = V_REF= 3.6V		-	279	307	µA
		fs = 1 MSPS / Reference buffer enabled / BIASREFBUF = '111', BIASREFCOMP = '111'	V_DDANA = 1.6V, V_REF = 1.0V		-	175	231	µA
			V_DDANA = 3.0V, V_REF = 2.0V		-	300	374
			V_DDANA= 3.6V, V_REF= 3.0V		-	356	438
		fs = 10 kSPS / Reference buffer disabled / BIASREFBUF = '111', BIASREFCOMP = '111'	V_DDANA = V_REF = 1.6V		-	30	41	µA
			V_DDANA = V_REF = 3.6V		-	53	71	µA
		fs = 10 kSPS / Reference buffer enabled / BIASREFBUF = '111', BIASREFCOMP = '111'	V_DDANA= 1.6V, V_REF= 1.0V		-	95	139	µA
			V_DDANA = 3.0V, V_REF = 2.0V		-	115	178
			V_DDANA = 3.6V, V_REF = 3.0V		-	122	187
I_{DD_VDDANA}⁽¹⁾	Single-Ended Mode	fs = 1 MSPS / Reference buffer disabled	V_DDANA = V_REF = 1.6V	Max.85°C Typ.25°C	-	138	158	µA
		fs = 1 MSPS / Reference buffer disabled	V_DDANA = V_REF = 3.6V		-	321	359	µA
		fs = 1 MSPS / Reference buffer enabled / BIASREFBUF = '111', BIASREFCOMP = '111'	V_DDANA = 1.6V, V_REF = 1.0V		-	203	257	µA
			V_DDANA = 3.0V, V_REF = 2.0V		-	331	413
			V_DDANA = 3.6V, V_REF = 3.0V		-	388	482
		fs = 10 kSPS / Reference buffer disabled / BIASREFBUF = '111', BIASREFCOMP = '111'	V_DDANA = V_REF = 1.6V		-	46	62	µA
			V_DDANA = V_REF = 3.6V		-	89	120	µA
		fs = 10 kSPS / Reference buffer enabled / BIASREFBUF = '111', BIASREFCOMP = '111'	V_DDANA = 1.6V, V_REF = 1.0V		-	109	157	µA
			V_DDANA = 3.0V, V_REF = 2.0V		-	138	211
			V_DDANA = 3.6V, V_REF = 3.0V		-	148	228

Note:

These values are based on characterization.

Table 44-25. Differential Mode⁽¹⁾
Symbol	Parameters	Conditions	Min.	Typ.	Max.	Unit
ENOB	Effective Number of bits (with gain compensation)	V_DDANA = 3.0V / V_ref = 2.0V	9.6	10.5	10.6	bits
		V_DDANA = 1.6V/3.6V, V_ref = 1.0V	8.9	9.7	9.9
		V_DDANA = V_ref= 1.6V	10	10.5	11.1
		V_DDANA = V_ref= 3.6V	10.5	10.9	11.0
TUE	Total Unadjusted Error	V_DDANA = 3.0V, V_ref = 2.0V	-	7.5	11	LSB
INL	Integral Non Linearity	V_DDANA = 3.0V, V_ref = 2.0V	-	+/-1.5	+/-2.1	LSB
DNL	Differential Non Linearity	V_DDANA = 3.0V, V_ref = 2.0V	-	+/-0.8	+1.1/-1.0	LSB
	Gain Error	External Reference voltage 1.0V	-	+/-0.7	+/-1.5	%
		External Reference voltage 3.0V		+/-0.2	0.5
		Internal Reference INTREF = 1.024V (SUPC.VREF.SEL = 0x0)	-	+/-0.4	+/-4.4
		V_DDANA		+/-0.1	0.4
		V_DDANA/2	-	+/-0.4	+/-1.3
		V_DDANA/1.6	-	+/-0.3	+/-0.9
	Offset Error	External Reference voltage 1.0V	-	+/-1.1	+/-2.4	mV
		External Reference voltage 3.0V		+/-1.1	3
		Internal Reference INTREF = 1.024V (SUPC.VREF.SEL = 0x0)	-	+/-2.3	+/-7.5
		V_DDANA		+/-0.9	2.9
		V_DDANA/2	-	+/-1	+/-2.6
		V_DDANA/1.6	-	+/-1	+/-2.9
SFDR	Spurious Free Dynamic Range	F_s = 1MHz / F_in = 13 kHz / Full range Input signal V_DDANA = 3.0V, V_ref= 2.0V	68	75	77	dB
SINAD	Signal to Noise and Distortion ratio		60	65	66
SNR	Signal to Noise ratio		61	66	67
THD	Total Harmonic Distortion		-74	-73	-67
	Noise RMS	External Reference voltage	-	1.0	2.5	mV

Note:

These values are based on characterization.

Table 44-26. Single-Ended Mode⁽¹⁾
Symbol	Parameters	Conditions	Min.	Typ.	Max.	Unit
ENOB	Effective Number of bits (with gain compensation)	V_DDANA = 3.0V / V_ref = 2.0V	8.5	9.5	9.8	bits
		V_DDANA = 1.6V/3.6V, V_ref = 1.0V	7.5	8.7	8.9
		V_DDANA = V_ref = 1.6V	9.0	9.5	9.8
		V_DDANA = V_ref= 3.6V	9.2	9.8	9.9
TUE	Total Unadjusted Error	V_DDANA = 3.0V, V_ref = 2.0V	-	17.4	31	LSB
INL	Integral Non Linearity	V_DDANA = 3.0V, V_ref = 2.0V	-	+/-2.2	+/-10.1	LSB
DNL	Differential Non Linearity	V_DDANA = 3.0V, V_ref = 2.0V	-	+/-0.8	+/-0.9	LSB
	Gain Error	External Reference voltage 1.0V	-	+/-1	+/-1.3	%
		External Reference voltage 3.0V		+/-0.3	+/-0.6
		Internal Reference INTREF = 1.024V (SUPC.VREF.SEL = 0x0)	-	+/-0.4	+/-3.2
		V_DDANA		+/-0.1	+/-0.3
		V_DDANA/2	-	+/-0.6	+/-1.4
		V_DDANA/1.6	-	+/-0.4	+/-1
	Offset Error	External Reference voltage 1.0V	-	+/-3.35	+/-13	mV
		External Reference voltage 3.0V		+/-3.6	+/-23.7
		Internal Reference INTREF = 1.024V (SUPC.VREF.SEL = 0x0)	-	+/-1	+/-14.4
		V_DDANA		+/-4.2	+/-24.8
		V_DDANA/2	-	+/-5.7	+/-10.1
		V_DDANA/1.6	-	+/-6.3	+/-13
SFDR	Spurious Free Dynamic Range	F_s = 1MHz / F_in = 13 kHz / Full range Input signal V_DDANA = 3.0V, V_ref = 2.0V	65	71	78	dB
SINAD	Signal to Noise and Distortion ratio		53	59	61
SNR	Signal to Noise ratio		53	59	61
THD	Total Harmonic Distortion		-76	-70	64
	Noise RMS	External Reference voltage	-	2.0	7.0	mV

Note:

These values are based on characterization.

The minimum sampling time t_SAMPLEHOLD for a given R_SOURCE can be found using this formula:

t_{S A M P L E H O L D} \geq (R_{S A M P L E} + R_{S O U R C E}) \times (C_{S A M P L E}) \times (n + 2) \times \ln (2)

For a 12 bits accuracy: $t_{S A M P L E H O L D} \geq (R_{S A M P L E} + R_{S O U R C E}) \times (C_{S A M P L E}) \times 9.7$