16.11 Register Summary


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	CTRL	7:0					MBIST	CRC		SWRST
0x01	STATUSA	7:0			BREXT	PERR	FAIL	BERR	CRSTEXT	DONE
0x02	STATUSB	7:0	BCCD1	BCCD0	DCCD1	DCCD0	HPE	DBGPRES	DAL[1:0]
0x03	Reserved
0x04	ADDR	7:0	ADDR[5:0]						AMOD[1:0]
		15:8	ADDR[13:6]
		23:16	ADDR[21:14]
		31:24	ADDR[29:22]
0x08	LENGTH	7:0	LENGTH[5:0]
		15:8	LENGTH[13:6]
		23:16	LENGTH[21:14]
		31:24	LENGTH[29:22]
0x0C	DATA	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x10	DCC0	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x14	DCC1	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x18	DID	7:0	DEVSEL[7:0]
		15:8	DIE[3:0]				REVISION[3:0]
		23:16	FAMILY[0]		SERIES[5:0]
		31:24	PROCESSOR[3:0]				FAMILY[4:1]
0x1C	CFG	7:0					DCCDMALEVEL[1:0]		LQOS[1:0]
		15:8
		23:16
		31:24
0x20	BCC0	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x24	BCC1	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
0x28 ... 0x0FFF	Reserved
0x1000	ENTRY0	7:0							FMT	EPRES
		15:8	ADDOFF[3:0]
		23:16	ADDOFF[11:4]
		31:24	ADDOFF[19:12]
0x1004	ENTRY1	7:0							Reserved	Reserved
		15:8	Reserved[3:0]
		23:16	Reserved[11:4]
		31:24	Reserved[19:12]
0x1008	END	7:0	END[7:0]
		15:8	END[15:8]
		23:16	END[23:16]
		31:24	END[31:24]
0x100C ... 0x1FCB	Reserved
0x1FCC	MEMTYPE	7:0								SMEMP
		15:8
		23:16
		31:24
0x1FD0	PID4	7:0	FKBC[3:0]				JEPCC[3:0]
		15:8
		23:16
		31:24
0x1FD4 ... 0x1FDF	Reserved
0x1FE0	PID0	7:0	PARTNBL[7:0]
		15:8
		23:16
		31:24
0x1FE4	PID1	7:0	JEPIDCL[3:0]				PARTNBH[3:0]
		15:8
		23:16
		31:24
0x1FE8	PID2	7:0	REVISION[3:0]				JEPU	JEPIDCH[2:0]
		15:8
		23:16
		31:24
0x1FEC	PID3	7:0	REVAND[3:0]				CUSMOD[3:0]
		15:8
		23:16
		31:24
0x1FF0	CID0	7:0	PREAMBLEB0[7:0]
		15:8
		23:16
		31:24
0x1FF4	CID1	7:0	CCLASS[3:0]				PREAMBLE[3:0]
		15:8
		23:16
		31:24
0x1FF8	CID2	7:0	PREAMBLEB2[7:0]
		15:8
		23:16
		31:24
0x1FFC	CID3	7:0	PREAMBLEB3[7:0]
		15:8
		23:16
		31:24