32.6.7 Threshold Comparison

At the end of each computation:

  • The conversion results are latched and held stable at the end of conversion.
  • The error (ADERR) is calculated based on a difference calculation which is selected by the CALC bits in the ADCON3 register. The value can be one of the following calculations:
    • The first derivative of single measurements
    • The CVD result in CVD mode
    • The current result vs. a setpoint
    • The current result vs. the filtered/average result
    • The first derivative of the filtered/average value
    • Filtered/average value vs. a setpoint
  • The result of the calculation (ADERR) is compared to the upper and lower thresholds, ADUTH[UTHH:UTHL] and ADLTH[LTHH:LTHL] registers, to set the UTHR and LTHR flag bits. The threshold logic is selected by the TMD bits. The threshold trigger option can be one of the following:
    • Never interrupt
    • Error is less than lower threshold
    • Error is greater than or equal to lower threshold
    • Error is between thresholds (inclusive)
    • Error is outside of thresholds
    • Error is less than or equal to upper threshold
    • Error is greater than upper threshold
    • Always interrupt regardless of threshold test results
    • If the threshold condition is met, the threshold interrupt flag ADTIF is set.
Note:
  1. The threshold tests are signed operations.
  2. If OV is set, a threshold interrupt is signaled. It is a good practice for threshold interrupt handlers to verify the validity of the threshold by checking ADAOV.

See the ADC Error Calculation Mode table for further details.