5.6.2 Linear Data Memory

The linear data memory is the region from FSR address 0x2000 to FSR address 0x2FEF. This region is a virtual region that points back to the 80-byte blocks of GPR memory in all the banks. Refer to Figure 5-10 for the Linear Data Memory Map.

Figure 5-10. Linear Data Memory Map
Important: The address range 0x2000 to 0x2FEF represents the complete addressable Linear Data Memory for PIC® devices (up to Bank 50). The actual implemented Linear Data Memory will differ from one device to the other in a family. Refer to the table below for the memory limits of PIC16(L)F18455/56 devices.
Table 5-4. General Purpose RAM Distribution
Bank #{bank:offset}Linear addressPIC16(L)F18455PIC16(L)F18456
00x020-0x06F0x2000-0x204F8080
10x0A0-0x0EF0x2050-0x209F8080
20x120-0x16F0x20A0-0x20EF8080
30x1A0-0x1EF0x20F0-0x213F8080
40x220-0x26F0x2140-0x218F8080
50x2A0-0x2EF0x2190-0x21DF8080
60x320-0x36F0x21E0-0x222F8080
70x3A0-0x3EF0x2230-0x227F8080
80x420-0x46F0x2280-0x22CF8080
90x4A0-0x4EF0x22D0-0x231F8080
100x520-0x56F0x2320-0x236F8080
110x5A0-0x5EF0x2370-0x23BF8080
12

0x620-0x64F

0x620-0x66F

0x23C0-0x23EF

0x23C0-0x240F

48

80

130x6A0-0x6EF0x2410-0x245F80
140x720-0x76F0x2460-0x24AF80
150x7A0-0x7EF0x24B0-0x24FF80
160x820-0x86F0x2500-0x254F80
170x8A0-0x8EF0x2550-0x259F80
180x920-0x96F0x25A0-0x25EF80
190x9A0-0x9EF0x25F0-0x263F80
200xA20-0xA6F0x2640-0x268F80
210xAA0-0xAEF0x2690-0x26DF80
220xB20-0xB6F0x26E0-0x272F80
230xBA0-0xBEF0x2730-0x277F80
240xC20-0xC6F0x2780-0x27CF80
250xCA0-0xCBF0x27D0-0x27EF32

Unimplemented memory reads as 0x00. Use of the linear data memory region allows buffers to be larger than 80 bytes because incrementing the FSR beyond one bank will go directly to the GPR memory of the next bank.

The 16 bytes of common memory are not included in the linear data memory region.