Initialize the SPxBRGH:SPxBRGL register pair and set or clear
the BRG16 bit, as required, to achieve the desired baud rate.
Select the receive input pin by writing
the appropriate values to the RxyPPS and RXxPPS registers. Both selections may enable
the same pin.
Select the clock output pin by writing
the appropriate values to the RxyPPS and CKxPPS registers. Both selections may enable
the same pin.
Clear the ANSEL bit for the RXx pin (if applicable).
Enable the synchronous host serial port by setting bits SYNC,
SPEN and CSRC.
Ensure that the CREN and SREN bits are cleared.
If interrupts are desired, set the RCxIE bit of the PIE3
register and the GIE and PEIE bits of the INTCON register.
If 9-bit reception is desired, set bit RX9.
Start reception by setting the SREN bit, or for continuous
reception set the CREN bit.
Interrupt flag bit RCxIF will be set when the reception of a
character is complete. An interrupt will be generated if the enable bit RCxIE was
set.
Read the RCxSTA register to get the ninth bit (if enabled) and determine if any error occurred during reception.
Read the 8-bit received data by reading the RCxREG register.
If an overrun error occurs, clear the error by either clearing the CREN bit of the RCxSTA register or by clearing the SPEN bit which resets the EUSART.
