4.7.4 CONFIG4

Memory Write Protection

Note:

Bits are implemented as sticky bits. Once protection is enabled, it can only be reset through a Bulk Erase.

Name:	CONFIG4
Address:	0x800A

Configuration Word 4


Bit	15	14	13	12	11	10	9	8
			LVP		WRTSAF	WRTD	WRTC	WRTB
Access			R/P	U	R/P	R/P	R/P	R/P
Reset			1	1	1	1	1	1


Bit	7	6	5	4	3	2	1	0
	WRTAPP			SAFEN	BBEN	BBSIZE[2:0]
Access	R/P	U	U	R/P	R/P	R/P	R/P	R/P
Reset	1	1	1	1	1	1	1	1

Bit 13 – LVP Low-Voltage Programming Enable bit

The LVP bit cannot be written (to zero) while operating from the LVP programming interface. The purpose of this rule is to prevent the user from dropping out of LVP mode while programming from LVP mode, or accidentally eliminating LVP mode from the Configuration state. The preconditioned (erased) state for this bit is critical.

Value	Description
`1`	Low-voltage programming enabled. MCLR/V_PP pin function is MCLR. The MCLRE Configuration bit is ignored.
`0`	HV on MCLR/V_PP must be used for programming

Bit 11 – WRTSAF Storage Area Flash Write Protection bit⁽¹⁾

Value	Description
`1`	SAF not write-protected
`0`	SAF write-protected

Bit 10 – WRTD Data EEPROM Write Protection bit⁽¹⁾

Value	Description
`1`	Data EEPROM not write-protected
`0`	Data EEPROM write-protected

Bit 9 – WRTC Configuration Register Write Protection bit⁽¹⁾

Value	Description
`1`	Configuration Registers not write-protected
`0`	Configuration Registers write-protected

Bit 8 – WRTB Boot Block Write Protection bit⁽¹⁾

Value	Description
`1`	Boot Block not write-protected
`0`	Boot Block write-protected

Bit 7 – WRTAPP Application Block Write Protection bit⁽¹⁾

Value	Description
`1`	Application Block not write-protected
`0`	Application Block write-protected

Bit 4 – SAFEN SAF Enable bit⁽¹⁾

Value	Description
`1`	SAF disabled
`0`	SAF enabled

Bit 3 – BBEN Boot Block Enable bit⁽¹⁾

Value	Description
`1`	Boot Block disabled
`0`	Boot Block enabled

Bits 2:0 – BBSIZE[2:0] Boot Block Size Selection bits

BBSIZE is used only when BBEN = 0.

BBSIZE can only be written while BBEN = 1; after BBEN = 0, BBSIZ is write-protected.

Table 4-1. Boot Block Size Bits
BBEN	BBSIZE	Actual Boot Block Size User Program Memory Size (words)		Last Boot Block Memory Access
BBEN	BBSIZE	PIC16(L)F18455	PIC16(L)F18456	Last Boot Block Memory Access
`1`	`xxx`	0	0	—
`0`	`111`	512	512	01FFh
`0`	`110`	1024	1024	03FFh
`0`	`101`	2048	2048	07FFh
`0`	`100`	4096	4096	0FFFh
`0`	`011-000`	—	8192	1FFFh
Note: The maximum boot block size is half the user program memory size. All selections higher than the maximum are set to half size. For example, all BBSIZE = `000 - 100` produce a boot block size of 4 kW on a 8 kW device.

Bits are implemented as sticky bits. Once protection is enabled, it can only be reset through a Bulk Erase.