9.16.4 ProASICPLUS and ProASIC Exit Codes

Table 9-34. ProASIC PLUS and ProASIC Family Devices Exit Codes
Exit Code	Exit Message	Possible Cause	Possible Solution
0	This message means passed. This does not indicate an error.
1	A physical chain does not match the expected set up from the STAPL file. Also known as Checking Chain Error.	Physical chain configuration has been altered. Something has become disconnected in the chain. The specific IR length of non-Actel devices may be incorrect. The order of the specified chain may be incorrect.
2	There is a reading device ID failure.	The device either does not have a valid device ID or the data cannot be read correctly.	Check the device ID.
3	This occurs when using ProASICPLUS devices.	Connect was set up for a ProASIC device and the device is actually ProASICPLUS.	Set up for a ProASICPLUS device.
5	Programming set up problem. Also known as Entering ISP Failure.	The A500K device senses the VDDL power supply as being on.	Power the VDDL down during programming. Check the device has the correct voltages on VDDP, VDDL, VPP, and VPN.
6	The IDCODE of the target device does not match the expected value in the STAPL file. This is a JEDEC standard message.	The device targeted in the STAPL file does not match the device being programmed. User selected wrong device. Device TRST pin is grounded. Noise or reflections on one or more of the JTAG pins caused by the IR Bits reading it back incorrectly.	Choose the correct STAPL file and select the correct device. Measure JTAG pins and noise or reflection. TRST should be floating or tied high. Cut down the extra length of ground connection.
7	Unknown	This occurs with current algorithm: alg=x, prev=x Invalid data read from device STAPL files when the revision written into the factory row is not rev 1 for ProASICPLUS or rev 2 for ProASIC devices. The STAPL files from last year may "exit 7" with newer devices or the older revision may cause this failure if the STAPL file used is from latest version. It can occur if you are using Engineering Sample parts that are no longer supported, such as ProASIC Engineering Sample parts. This error can also occur if the programmer has trouble reading the factory row due to signal noise, crosstalk, or reflections on the JTAG signal and clock lines. It can occur if you program an -F ProASICPLUS device with an old STAPL file. This error occurs if you connected VPP and VPN the wrong way. It occurs if there are no bypass Caps on VPP VPN, which damaged the device. This error may occur if your power supply cannot source the correct current for programming.	Re-generate STAPL file from Designer 6.1 SP1. Replace A500K ES parts with commercial parts. Double check VPP and VPN connections. Make sure VPP and VPN have correct bypass caps. Make sure that your power supply can deliver the correct current during programming.
8	FPGA failed during the erase operation.	The device is secured, and the corresponding STAPL file is not loaded. The device has been permanently secured and cannot be unlocked.	Load the correct STAPL file.
11	FPGA failed verify	The device is secured and the corresponding STAPL file is not loaded. You used the Libero IDE software v2.3 or earlier or the Designer R1-2003 software or earlier to generate the STAPL file. VPN caps were soldered in the wrong polarity.	Load the correct STAPL file. Use later software versions —at least Libero v2.3 SP1 and Designer R1-2003 SP1. Double-check the VPN bypass caps polarity.
12	Security is enabled.	The device is secured and the wrong key/STAPL file was entered. The device is damaged. The verification was interrupted and therefore fails, causing the software to think the device is secure.
14	Program security failure.
15	This is a factory Calibration Data CRC error.	During program, erase, or verify, you must read back Calibration Data from the FPGA. The data contains a CRC. You use the CRC to ensure the data is not corrupted/wrong. Device is damaged. Noise on the FTAL signals causes the programmer to read back wrong data.
17	The device has been secured. Write-security is enabled.	The device is secured and the wrong key or STAPL file was entered. The device is damaged.	Load the correct STAPL file.
-80	Error code results from STAPL files for A500K devices.	An internal calibration (based on DDP and VPP) failed.	Check voltages on the device pins. Check voltages on the VDDP and VPP pins.
-90	Unexpected RCK detected.	Noise on the RCK signal. You connected a CLK source to the RCK signal. The polarized bypass capacitors on VPP or VPN are reversed-biased and are affecting the programmer’s VPP or VPN output voltage. This causes programming to fail. Several FlashPros are programming at the same time and are too close to each other. Programmer not properly installed by Admin.	Disconnect the RCK and make sure TCK has a clean signal. Separate FlashPros away from each other while they are programming Internal ISP. Connect programmer as an Admin in FlashPro.
-91	Calibration data parity error.	Device is damaged.	Replace the device.
Null		Several FlashPros are programming at the same time and are too close to each other. FlashPro connects to PC parallel port through a dongle key. Data length mismatch when performing DRSCAN on STAPL file. Cable to target is not connected properly. When the Analyze command is executed, the FlashPro looks for target devices. If the cable connection is wrong, FlashPro assumes that nothing is connected at all.	Confirm the connection between the header to the device. If the board supplies the power to the device, make sure the voltage level is correct.
	Chain integrity test failed: xx	The connection between the FlashPro programmer and the device is broken. The programmer cable might not be securely inserted into the header. The header is not connected to the JTAG pins of the FPGA correctly. The configuration setting (ProASIC/ProASICPLUS) does not match the target device. Noise or reflections on the JTAG pins has caused communication between the programmer and the device to fail. A dongle is plugged in between the PC parallel port and the FlashPro parallel port cable.	Secure the connections. Check the JTAG pins for signal activity. Check for broken TDO, TMS, and TCK pins. After checking all type of connections if the failure exists, you may need to replace the first device (the devices closest to the TDO of the programming header) in the chain. Remove the dongle.
	Could not connect to programmer on port lp1 or parallel port device does not support IEEE-1284 negotiation protocol	The remote device does not respond to the negotiation protocol, for a variety of reasons.	Make sure the port is connected. Make sure the connected device is a FlashPro/Lite programmer. Turn the programmer on. Check parallel port setting in BIOS. Make sure that there are no dongles in between the parallel port and the FlashPro connection. Try another parallel cable, the parallel cable might be defective. Check to see if the programmer is damaged. Make sure the FlashPro Lite has power. The FlashPro Lite is powered from the target board through the Vdd pin of the programming header. Make sure the Vdd pin is connected and the target board is powered up. Secure the connection between the cable connector and the programming header. Before you program any devices, you should run the self-diagnostic test (see “Self-test” on page 16). Note: The Self-test is only available for FlashPro, not FlashPro Lite.
	External voltage detected on <Supply>	The voltage supply for the FPGA is driven by another source (board, external power-supply), but the user forgot to turn off the supply in the Connect menu.	Set appropriate options in the Connect menu.
	VDPP Disconnected.	There is no Vddp voltage supply to the FPGA. You accidentally turned off the Vddp supply in the Connect menu. The Vddp supply on the board is not functioning.	Check the Vddp supply on the board for appropriate voltages and correct the Connect menu.
	More than one unidentified device.	If you want to perform an operation on the ProASIC device, the rest of the devices in the chain must be in bypass mode. STAPL settings of Pre IR, Pre DR, Post IR, and Post DR do not match the chain configuration. One or more of the devices in the chain is damaged and the ID CODE cannot be read back.	To put devices in bypass mode, select Configuration > Chain Parameter. Set Pre IR, Pre DR, Post IR, and Post DR to match the chain configuration. If the failure persists, replace the damaged device.
	Cannot find the programmer with ID xxx	The programmer is removed from the PC.	Delete programmer (or reconnect programmer) and select the Refresh Programmer button. See Connecting Programmers for more information.
	Fatal Error: Please check programmer set up.	Software cannot resolve the error encountered in the programmer.	Save the project file. Restart the software. Power cycle the programmer.
	External voltage xxx mV is detected on xxx.	You have specified the programmer to drive the xxx but external xxx is detected.	Deselect the xxx in the programmer setting.
	Executing action xxx failed.	The STAPL runtime failed.
	Executing action xxx with serial index/action xx failed.	The STAPL runtime failed.
	No Vpump voltage source is detected.		Select the Vpump in the Programmer setting. Make sure the external Vpump is properly turned on.
	Vpump short detected.		Use a different programmer. If the problem persists, check the board layout.
	xxx Mhz TCK frequency in this STAPL file is not supported by the FlashPro Lite detected. It supports only 4 MHz TCK frequency.		Check FlashPro Lite version being used. Use FlashPro Lite Rev C or modify the STAPL file to 4 MHz.
	xxx Mhz TCK frequency in this STAPL file is not supported by the FlashPro Lite RevC detected. It supports only 1, 2 or 4 Mhz TCK frequency.		Modify STAPL file to 1, 2, or 4 MHz.
	Cannot find the serial Index/Action xxx in STAPL file.	Mismatch between STAPL file and the Index/Action selection.	Make sure the STAPL file was not overwritten. Save the project with updated serial/action selection.
	Duplicated serial Index/Action xxx was removed.	Mismatch between STAPL file and the Index/Action selection.	Make sure the STAPL file was not overwritten. Save the project with updated serial/action selection.
	Using local backup copy xxx Cannot find original copy.		Check for available space on the disk. Check that write permissions are enabled.
	FlashPro cannot rename the programmer/device with an existing name.	Name is already in use.	Create a new name.
	FlashPro cannot rename the programmer/device with an invalid character.	Invalid character used in programmer/device name.	Do not use invalid characters.
	Automatic check for updates.	Check if a new version of the FlashPro software is available. If you would like to have FlashPro automatically check for software updates, choose Preferences from the File menu. From the Updates tab, you can choose your automatic software update settings. You can also select Software Updates from the Help menu for updates to the FlashPro software.
	FlashPro parse error.	FlashPro software failed to parse the file.
	FlashPro does not support STAPL files for xxx.	STAPL file not allowed.	Use a STAPL file for your device that is supported by FlashPro.

0

This message means passed. This does not indicate an error.

1

A physical chain does not match the expected set up from the STAPL file.

Also known as

Checking Chain Error.

Physical chain configuration has been altered. Something has become disconnected in the chain.

The specific IR length of

non-Actel devices may be incorrect.

The order of the specified chain may be incorrect.

2

There is a reading device ID failure.

The device either does not have a valid device ID or the data cannot be read correctly.

Check the device ID.

3

This occurs when using ProASICPLUS devices.

Connect was set up for a ProASIC device and the device is actually ProASICPLUS.

Set up for a ProASICPLUS device.

5

Programming set up problem. Also known as Entering ISP Failure.

The A500K device senses the VDDL power supply as being on.

Power the VDDL down during programming.

Check the device has the correct voltages on VDDP, VDDL, VPP, and VPN.

6

The IDCODE of the target device does not match the expected value in the STAPL file.

This is a JEDEC standard message.

The device targeted in the STAPL file does not match the device being programmed.

User selected wrong device. Device TRST pin is grounded.

Noise or reflections on one or more of the JTAG pins caused by the IR Bits reading it back incorrectly.

Choose the correct STAPL file and select the correct device.

Measure JTAG pins and noise or reflection. TRST should be floating or tied high.

Cut down the extra length of ground connection.

7

Unknown

This occurs with current

algorithm: alg=x, prev=x Invalid data read from device

STAPL files when the revision written into the factory row is not rev 1 for ProASICPLUS or rev 2 for ProASIC devices.

The STAPL files from last year may "exit 7" with newer devices or the older revision may cause this failure if the STAPL file used is from latest version.

It can occur if you are using Engineering Sample parts that are no longer supported, such as ProASIC Engineering Sample parts.

This error can also occur if the programmer has trouble reading the factory row due to signal noise, crosstalk, or reflections on the JTAG signal and clock lines.

It can occur if you program an -F ProASICPLUS device with an old STAPL file.

This error occurs if you connected VPP and VPN the wrong way.

It occurs if there are no bypass Caps on VPP VPN, which damaged the device.

This error may occur if your power supply cannot source the correct current for programming.

Re-generate STAPL file from Designer 6.1 SP1.

Replace A500K ES parts with commercial parts.

Double check VPP and VPN connections.

Make sure VPP and VPN have correct bypass caps.

Make sure that your power supply can deliver the correct current during programming.

8

FPGA failed during the erase operation.

The device is secured, and the corresponding STAPL file is not loaded.

The device has been permanently secured and cannot be unlocked.

Load the correct STAPL file.

11

FPGA failed verify

The device is secured and the corresponding STAPL file is not loaded.

You used the Libero IDE software v2.3 or earlier or the Designer R1-2003 software or earlier to generate the STAPL file.

VPN caps were soldered in the wrong polarity.

Load the correct STAPL file.

Use later software versions —at least Libero v2.3 SP1 and Designer R1-2003 SP1.

Double-check the VPN bypass caps polarity.

12

Security is enabled.

The device is secured and the wrong key/STAPL file was entered.

The device is damaged. The verification was interrupted and therefore fails, causing the software to think the device is secure.

14

Program security failure.

15

This is a factory Calibration Data CRC error.

During program, erase, or verify, you must read back Calibration Data from the FPGA.

The data contains a CRC.

You use the CRC to ensure the data is not corrupted/wrong.

Device is damaged.

Noise on the FTAL signals causes the programmer to read back wrong data.

17

The device has been secured. Write-security is enabled.

The device is secured and the wrong key or STAPL file was entered.

The device is damaged.

Load the correct STAPL file.

-80

Error code results from STAPL files for A500K devices.

An internal calibration (based on DDP and VPP) failed.

Check voltages on the device pins.

Check voltages on the VDDP and VPP pins.

-90

Unexpected RCK detected.

Noise on the RCK signal.

You connected a CLK source to the RCK signal.

The polarized bypass capacitors on VPP or VPN are reversed-biased and are affecting the programmer’s VPP or VPN output voltage.

This causes programming to fail.

Several FlashPros are programming at the same time and are too close to each other.

Programmer not properly installed by Admin.

Disconnect the RCK and make sure TCK has a clean signal.

Separate FlashPros away from each other while they are programming Internal ISP.

Connect programmer as an Admin in FlashPro.

-91

Calibration data parity error.

Device is damaged.

Replace the device.

Null

Several FlashPros are programming at the same time and are too close to each other.

FlashPro connects to PC parallel port through a dongle key.

Data length mismatch when performing DRSCAN on STAPL file.

Cable to target is not connected properly.

When the Analyze command is executed, the FlashPro looks for target devices.

If the cable connection is wrong, FlashPro assumes that nothing is connected at all.

Confirm the connection between the header to the device.

If the board supplies the power to the device, make sure the voltage level is correct.

Chain integrity test failed: xx

The connection between the FlashPro programmer and the device is broken.

The programmer cable might not be securely inserted into the header.

The header is not connected to the JTAG pins of the FPGA correctly.

The configuration setting (ProASIC/ProASICPLUS) does not match the target device.

Noise or reflections on the JTAG pins has caused communication between the programmer and the device to fail.

A dongle is plugged in between the PC parallel port and the FlashPro parallel port cable.

Secure the connections.

Check the JTAG pins for signal activity.

Check for broken TDO, TMS, and TCK pins.

After checking all type of connections if the failure exists, you may need to replace the first device (the devices closest to the TDO of the programming header) in the chain.

Remove the dongle.

Could not connect to programmer on port lp1 or parallel port device does not support IEEE-1284 negotiation protocol

The remote device does not respond to the negotiation protocol, for a variety of reasons.

Make sure the port is connected.

Make sure the connected device is a FlashPro/Lite programmer.

Turn the programmer on.

Check parallel port setting in BIOS.

Make sure that there are no dongles in between the parallel port and the FlashPro connection.

Try another parallel cable, the parallel cable might be defective.

Check to see if the programmer is damaged.

Make sure the FlashPro Lite has power.

The FlashPro Lite is powered from the target board through the Vdd pin of the programming header.

Make sure the Vdd pin is connected and the target board is powered up.

Secure the connection between the cable connector and the programming header.

Before you program any devices, you should run the self-diagnostic test (see “Self-test” on page 16).

Note: The Self-test is only available for FlashPro, not FlashPro Lite.

External voltage detected on <Supply>

The voltage supply for the FPGA is driven by another source (board, external power-supply), but the user forgot to turn off the supply in the Connect menu.

Set appropriate options in the Connect menu.

VDPP Disconnected.

There is no Vddp voltage supply to the FPGA.

You accidentally turned off the Vddp supply in the Connect menu.

The Vddp supply on the board is not functioning.

Check the Vddp supply on the board for appropriate voltages and correct the Connect menu.

More than one unidentified device.

If you want to perform an operation on the ProASIC device, the rest of the devices in the chain must be in bypass mode.

STAPL settings of Pre IR, Pre DR, Post IR, and Post DR do not match the chain configuration.

One or more of the devices in the chain is damaged and the ID CODE cannot be read back.

To put devices in bypass mode, select Configuration > Chain Parameter.

Set Pre IR, Pre DR, Post IR, and Post DR to match the chain configuration.

If the failure persists, replace the damaged device.

Cannot find the programmer with ID xxx

The programmer is removed from the PC.

Delete programmer (or reconnect programmer) and select the Refresh Programmer button.

See Connecting Programmers for more information.

Fatal Error: Please check programmer set up.

Software cannot resolve the error encountered in the programmer.

Save the project file.

Restart the software.

Power cycle the programmer.

External voltage xxx mV is detected on xxx.

You have specified the programmer to drive the xxx but external xxx is detected.

Deselect the xxx in the programmer setting.

Executing action xxx failed.

The STAPL runtime failed.

Executing action xxx with serial index/action xx failed.

The STAPL runtime failed.

No Vpump voltage source is detected.

Select the Vpump in the Programmer setting.

Make sure the external Vpump is properly turned on.

Vpump short detected.

Use a different programmer.

If the problem persists, check the board layout.

xxx Mhz TCK frequency in this STAPL file is not supported by the FlashPro Lite detected.

It supports only 4 MHz TCK frequency.

Check FlashPro Lite version being used.

Use FlashPro Lite Rev C or modify the STAPL file to 4 MHz.

xxx Mhz TCK frequency in this STAPL file is not supported by the FlashPro Lite RevC detected.

It supports only 1, 2 or 4 Mhz TCK frequency.

Modify STAPL file to 1, 2, or 4 MHz.

Cannot find the serial Index/Action xxx in STAPL file.

Mismatch between STAPL file and the Index/Action selection.

Make sure the STAPL file was not overwritten.

Save the project with updated serial/action selection.

Duplicated serial Index/Action xxx was removed.

Mismatch between STAPL file and the Index/Action selection.

Make sure the STAPL file was not overwritten.

Save the project with updated serial/action selection.

Using local backup copy xxx

Cannot find original copy.

Check for available space on the disk.

Check that write permissions are enabled.

FlashPro cannot rename the programmer/device with an existing name.

Name is already in use.

Create a new name.

FlashPro cannot rename the programmer/device with an invalid character.

Invalid character used in programmer/device name.

Do not use invalid characters.

Automatic check for updates.

Check if a new version of the FlashPro software is available.

If you would like to have FlashPro automatically check for software updates, choose Preferences from the File menu.

From the Updates tab, you can choose your automatic software update settings.

You can also select Software Updates from the Help menu for updates to the FlashPro software.

FlashPro parse error.

FlashPro software failed to parse the file.

FlashPro does not support STAPL files for xxx.

STAPL file not allowed.

Use a STAPL file for your device that is supported by FlashPro.