9.16.3 IGLOO®, ProASIC3, SmartFusion® and Fusion Device Exit Codes for pre-v8.6 Software
The table below lists exit codes for IGLOO®, ProASIC3, SmartFusion® and Fusion devices in pre-v8.6 software only. This includes v8.5 SP2, v8.5 SP1, v8.5, etc. See the Device Exit Codes for Software v8.6 and Above help topic for exit codes for older versions.
Note: Exit codes with positive integers are reserved for current and future standard EXIT codes of the STAPL standard. Exit codes with negative integers are reserved for vendor-specific EXIT codes.
Table 23 ·
| Exit Code | Exit Message | Possible Cause | Possible Solution |
|---|---|---|---|
|
0 |
Passed (no error). | ||
|
1 |
A physical chain does not match the expected set up from the STAPL file. Also known as Checking Chain Error. |
Physical chain configuration has been altered. Something has become disconnected in the chain. The specific IR length of non-Actel devices may be incorrect. The order of the specified chain may be incorrect. | |
|
5 |
Failed to enter programming mode. |
Unstable VPUMP voltage level. Signal integrity issues on JTAG pins. Older software or programming file used. |
Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, and reflection. Generate STAPL file with the latest version of Designer/FlashPro. Use latest version of FlashPro software. |
|
6 |
Failed to verify IDCODE. |
Signal integrity issues on JTAG pins. |
Measure JTAG pins, noise, and reflection. |
|
8 |
Failed Erase Operation. |
Signal integrity issues on JTAG pins. |
Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, and reflection. |
|
10 |
Failed to program FPGA array at row <row number>. |
Signal integrity issues on JTAG pins. |
Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, or reflection. |
|
10 |
Failed to enable FPGA Array. |
Signal integrity issues on JTAG pins. |
Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, or reflection. |
|
10 |
Failed to program FlashROM. |
Signal integrity issues on JTAG pins. |
Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, and reflection. |
|
11 |
Verify 0 failed at row <row number>. Verify 1 failed at row <row number>. Failed to verify FlashROM. |
Device is programmed with a different design. Signal integrity issues on JTAG pins. |
Run VERIFY_DEVICE_INFO to verify the device is programmed with the correct data/design. Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, and reflection. |
|
14 |
Failed to program Silicon Signature. Failed to program security lock settings. |
Signal integrity issues on JTAG pins. |
Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, and reflection. |
|
-18 |
Failed to authenticate the encrypted data. |
Incorrect AES key. Signal integrity issues on JTAG pins. |
Generate a programming file with the correct AES key. Measure JTAG voltages, noise, and reflection. |
|
-20 |
Failed to verify FlashROM at row <FlashROM row number>. |
Device is programmed with a different design. Signal integrity issues on JTAG pins. |
Program with the correct data/design. Monitor VPUMP voltage during programming. Measure JTAG pins, noise, or reflection. |
|
-22 |
Failed to program pass key. |
Unstable VPUMP voltage level. Signal integrity issues on JTAG pins. |
Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, and reflection. |
|
-23 |
Failed to program AES key. |
Unstable VPUMP voltage level. Signal integrity issues on JTAG pins. |
Monitor VPUMP voltage during programming. Measure JTAG pins, noise, or reflection. |
|
-24 |
Failed to program UROW. |
Unstable VPUMP voltage level. Signal integrity issues on JTAG pins. |
Monitor VPUMP voltage during programming. Measure JTAG voltages, noise, and reflection. Make sure you mounted 0.01 µF and 0.33 µF capacitors on VPUMP close to the pin. |
|
-25 |
Failed to enter programming mode. |
Signal integrity issues on JTAG pins. |
Measure JTAG voltages, noise, and reflection. |
|
-26 |
Failed to enter programming mode. |
Signal integrity issues on JTAG pins. |
Measure JTAG voltages, noise, and reflection. |
|
-27 |
FlashROM Write/Erase is protected by the passkey. A valid passkey needs to be provided. |
File contains no passkey and device is secured with a passkey. Passkey in the file does not match device. |
Provide a programming file with a passkey that matches the passkey programmed into the device. |
|
-28 |
FPGA Array Write/Erase is protected by the passkey. A valid passkey needs to be provided. |
File contains no passkey and device is secured with a passkey. Passkey in the file does not match device. |
Provide a programming file with a passkey that matches the passkey programmed into the device. |
|
-29 |
FlashROM Read is protected by passkey. A valid passkey needs to be provided. |
File contains no passkey and device is secured with a passkey. Passkey in the file does not match device. |
Provide a programming file with a passkey that matches the passkey programmed into the device. |
|
-30 |
FPGA Array verification is protected by a passkey. A valid passkey needs to be provided. |
File contains no passkey and device is secured with a passkey. Passkey in the file does not match device. |
Provide a programming file with a passkey that matches the passkey programmed into the device. |
|
-31 |
Failed to verify AES key. |
AES key in the file does not match the device. Unstable JTAG/VPUMP voltage level. |
Provide a programming file with an AES key that matches the AES key programmed into the device. Monitor VPUMP/VJTAG voltage during programming. Measure JTAG voltages, noise, and reflection. |
|
-32 |
Failed to verify IDCODE. Target is an M7 device |
File is not for M7, but target device is an M7. Signal integrity issues on JTAG pins. |
Check that the target device is M7 enabled. Make sure programming file generated is for M7 enabled device. Measure JTAG pins, noise, and reflection. |
|
-32 |
Failed to verify IDCODE. Target is an M1 device |
File is not for M1, but target device is an M1 device. Signal integrity issues on JTAG pins. |
Check that the target device is M1 enabled. Make sure programming file generated is for M1 enabled device. Measure JTAG pins, noise, and reflection. |
|
-32 |
Failed to verify IDCODE. Core enabled device detected |
File is not for target device. Signal integrity issues on JTAG pins. |
Check the target device. Make sure programming file generated is for the target device. Measure JTAG voltages, noise, and reflection. |
|
-32 |
Failed to verify IDCODE. The target is not an M7 device |
File is for M7, but target device is not M7. Signal integrity issues on JTAG pins. |
Check that the target device is not M7 enabled. Make sure programming file generated is for non-M7 enabled device. Measure JTAG voltages, noise, and reflection. |
|
-32 |
Failed to verify IDCODE. The target is not an M1 device |
File is for M1, but target device is not an M1 device. Signal integrity issues on JTAG pins. |
Check that the target device is not M1 enabled. Make sure programming file generated is for non-M1 enabled device. Measure JTAG voltages, noise, and reflection. |
|
-33 |
FPGA Array encryption is enforced. A programming file with encrypted FPGA array data needs to be provided. |
File contains unencrypted array data, but device contains AES key. |
Provide a programming file with encrypted FPGA Array data. |
|
-34 |
FlashROM encryption is enforced. A programming file with encrypted FlashROM data needs to be provided. |
File contains unencrypted FlashROM data, but device contains an AES key. |
Provide a programming file with encrypted FlashROM data. |
|
-35 |
Failed to match pass key. |
Pass key in file does not match pass key in device. |
Provide a programming file with a pass key that matches the pass key programmed into the device. |
|
-36 |
FlashROM Encryption is not enforced. Cannot guarantee valid AES key present in target device. Unable to proceed with Encrypted FlashROM programming. |
File contains encrypted FlashROM, but device encryption is not enforced for FlashROM. |
Regenerate security programming file with proper AES key. Program device security. Retry programming FlashROM with encrypted programming file. |
|
-37 |
FPGA Array Encryption is not enforced. Cannot guarantee valid AES key present in target device. Unable to proceed with Encrypted FPGA Array verification. |
File contains encrypted FPGA Array, but the device encryption is not enforced for FPGA Array. |
Regenerate security programming file with proper AES key. Program device security. Retry programming FPGA Array with encrypted programming file. |
|
-38 |
Failed to program pass key. |
Unstable VPUMP voltage level. Signal integrity issues on JTAG pins. Bad device. |
Monitor VPUMP voltage during programming. Measure JTAG pins, noise, and reflection. |
|
-39 |
Failed to verify Embedded Flash Memory Block (EFMB). |
Device is programmed with a different design. Signal integrity issues on JTAG pins. The EFMB data was modified through user FPGA design after programming. The target EFMB block is locked with FlashLock. |
Verify the device is programmed with the correct data/design. Monitor VPUMP voltage during programming. Measure JTAG pins, noise, and reflection. Run DEVICE_INFO to confirm if the EFMB block is locked with FlashLock. If locked, erase security and reprogram with desired security settings. Retry the target ACTION. |
|
-40 |
Embedded Flash Memory Block MAC Failure. |
Data in the file is encrypted with a different AES key than the device. |
Verify the programming file is generated from the latest version of Designer/FlashPro. |
|
-41 |
Error programming Embedded Flash Memory Block (EFMB). |
Signal integrity issues on JTAG pins. |
Measure JTAG pins, noise, and reflection. |
|
-42 |
Failed to verify security settings. |
File security settings do not match device. |
Provide a programming file with security settings that match the device. |
|
-43 |
Failed to verify design information. |
File checksum and design name do not match the device. |
Verify the device is programmed with the correct data and design. |
|
-44 |
Failed to verify AES key. |
The AES key in the file does not match the AES key in the device. File does not contain an AES key and the device is secured with an AES key. |
Provide a programming file with an AES key that matches the AES key programmed into the device. |
|
-45 |
Device package does not match the programming file. | ||
|
-46 |
Embedded Flash Memory Block X Read is protected by pass key. A valid pass key needs to be provided. |
File contains no pass key or incorrect pass key but EFMB read is secured with a pass key. |
Provide a programming file with the correct pass key. |
|
-47 |
Embedded Flash Memory Block (EFMB) block X encryption is enforced. A programming file with encrypted EFMB data needs to be provided. |
The programming EFMB data is not encrypted, but the device contains an AES key. |
Provide a programming file with encrypted EFMB data. |
|
-48 |
Embedded Flash Memory Block (EFMB) block X Write is protected by pass key. A valid pass key needs to be provided. |
File contains no pass key or incorrect pass key, but device is secured with a pass key. |
Provide a programming file with a pass key that matches the pass key programmed into the device. |
|
-49 |
Embedded Flash Memory Block (EFMB) block X Encryption is not enforced. Cannot guarantee valid AES key present in target device. Unable to proceed with Encrypted EFMB programming. |
File contains encrypted EFMB for block X, but encryption is not enforced. |
Regenerate security programming file with proper AES key. Program device security. Retry programming EFMB block X with encrypted programming file. |
|
-51 |
Failed to access Embedded Flash Memory. (AFS600 only) |
This silicon version does not support EFMB programming while FPGA Array is active. |
If EFMB programming while active is not required, use PROGRAM_NVM or VERIFY_NVM. Otherwise, use latest revision of silicon. |
|
-52 |
Failed to access Embedded Flash Memory. (AFS1500 only) |
This silicon version does not support EFMB programming while FPGA Array is active. |
If EFMB programming while active is not required, use PROGRAM_NVM or VERIFY_NVM. Otherwise, use latest revision of silicon. |
|
-53 |
Failed to access Embedded Flash Memory. (AFS1500 only) |
This silicon version does not support programming block 3 of EFMBs while FPGA Array is active. |
If EFMB programming while active is not required, use PROGRAM_NVM or VERIFY_NVM. Otherwise, use EFMB blocks 0, 1, or 2 only. |
|
-54 |
Failed to access Embedded Flash Memory. |
FPGA Array is accessing the target EFMB block. NVM reset signal is stuck in design. |
If EFMB programming while active is not required, use PROGRAM_NVM or VERIFY_NVM. Otherwise, check FPGA design or use a different EFMB block. Verify NVM reset signal is not stuck. |