22.15.1 Delay Constraint Guidelines

Delay constraints control the Timing-Driven Layout engine. You can define these constraints using Timer or by importing an external DCF or SDC file. The timing-driven layout engine considers the defined delays when allocating silicon resources with the goal of meeting or beating all constraints if possible. Because resources are limited, use the following guidelines to ensure the defined constraints meet the needs of the design without impairing device resources.

General Guidelines

• Set Sufficient Constraints - All constraints for the design should be defined to ensure correct operation of the Timing-Driven Layout engine. Timing-Driven Layout considers networks that have not been defined as “don’t care” paths, which have a low priority for resource allocation. If these undefined paths are actually critical,they may fail to meet performance demands.
• Avoid Unnecessary Constraints - Describe "don't care" paths to free high performance device resources. Designer provides false paths, clock exceptions, and global stops for the user to define these “don’t care” paths. (See Clock exceptions and set_false_path).
• Avoid Over-Constraining - The Timing-Driven Layout engine is designed to achieve or exceed the delay constraint defined. Defining a constraint shorter than is actually required for margin can have a negative impact on performance because of competition for device resources.