11.4.6 QCLKINT/QCLKBUF for Medium Fanout Networks

The DX and MX have four quadrant clocks that can be used to drive internally generated high fanout nets (QCLKINT) or high fanout nets generated from I/O ports (QCLKBUF). The methodology and instantiation are similar to the CLKINT/CLKBUF drivers. However, the QCLK drivers can only drive within a quadrant. Although the placement of the cells into a quadrant is automated by the Designer place-and-route software, you must limit the number of fanouts and prevent the use of multiple QCLK signals to drive the same cell or gate. You can double your fanout limit and drive half the chip by combining two drivers into one to drive 2 quadrants. However, each time you combine drivers, you reduce the number of available QCLKs by one. The Designer place-androute software automatically combines QCLKs when necessary