10.5.1 Flash*Freeze Management Core

This core manages entry and exit from the Flash*Freeze state by notifying user logic that the device is about to enter Flash*Freeze.

Supported Families

The following is a list of the supported families:

  • IGLOO®
  • ProASIC®3L

When we list a family name, we refer to the device family and all its derivatives, unless otherwise specified. IGLOO® indicates all the IGLOO families (IGLOO, IGLOOe, etc).

Description

This core manages entry and exit from the Flash*Freeze state by notifying user logic that the device is about to enter Flash*Freeze. This enables the user logic to reach a proper state, and ensures that any critical operations that are in process are completed (such as completing control register updates for peripherals, or waiting for incrementing/decrementing address pointers that are in process, etc).

The Flash*Freeze management core includes an INBUF_FF macro with a user-defined port name (default is Flash_Freeze_N). This port must be connected to the top level of your design. It is used to connect to the Flash*Freeze pin on your device.

Key Features

  • Manages entry and exit from Flash*Freeze mode
  • Protects user logic from narrow pulses on the clock and allows critical processes to complete
    Figure 10-82.  Key Features
    Key Features