5.27.1 Timing Constraints

Timing constraints represent the performance goals for your designs. Designer software uses timing constraints to guide the timing-driven optimization tools in order to meet these goals.

You can set timing constraints either globally or to a specific set of paths in your design. You can apply timing constraints to:

• Specify the required minimum speed of a clock domain
• Set the input and output port timing information
• Define the maximum delay for a specific path
• Identify paths that are considered false and excluded from the analysis
• Identify paths that require more than one clock cycle to propagate the data
• Provide the external load at a specific port

To get the most effective results from the Designer software, you need to set the timing constraints close to your design goals. Sometimes slightly tightening the timing constraint helps the optimization process to meet the original specifications.