2.12.5 sEEPromTrxCalib eepTrxCal
The sEEPromTrxCalib eepTrxCal variable contains the settings for the transceiver calibration.
calConf1
The calConf1 variable sets the calibration options during system self-check and calibration. See System Self-Check and Calibration for a functional description.
| Address | Name | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|---|---|---|
| 0x001C | calConf1 | — | EN_TEMP_MEAS | EN_SRCCAL | EN_FRCCAL | — | — | — | EN_REGREFRESH |
Bit 7: Reserved Bit
This bit is reserved for future use and must be set to ‘0’.
Bit 6: EN_TEMP_MEAS – Enable Temperature Measurement
0 = Temperature measurement disabled
1 = Temperature measurement enabled
Bit 5: EN_SRCCAL – Enable SRC Calibration
0 = Polling cycle/SRC calibration disabled
1 = Polling cycle/SRC calibration enabled
Bit 4: EN_FRCCAL – Enable FRC Calibration
0 = FRC calibration disabled
1 = FRC calibration enabled
Bits 3..1: Reserved Bits
These bits are reserved for future use and must be set to ‘0’.
Bit 0: EN_REGREFRESH – Enable Register Refresh
0 = Register refreshing disabled
1 = Register refreshing enabled
calConf2
The calConf2 variable is used to calibrate the length of the polling cycle to the crystal oscillator frequency.
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Address |
Name |
Bit 7 |
Bit 6 |
Bit 5 |
Bit 4 |
Bit 3 |
Bit 2 |
Bit 1 |
Bit 0 |
|---|---|---|---|---|---|---|---|---|---|
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0x001D |
calConf2 |
SRC[7:0] | |||||||
Bits 7..0: SRC[7:0] – SRC Calibration Variable
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SRC7 |
SRC6 |
SRC5 |
SRC4 |
SRC3 |
SRC2 |
SRC1 |
SRC0 |
Function |
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SRCCAL_VAR = |
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SRCCAL_VAR = |
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SRCCAL_VAR = 125 (valid for fXTO = 23.8MHz) |
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SRCCAL_VAR = 133 (valid for fXTO = 24.305MHz) |
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SRCCAL_VAR = 163 (valid for fXTO = 26.2MHz) |
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selfChk
The selfChk variable defines the execution period of the self-check function. See PollingMode for a functional description.
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Address |
Name |
Bit 7 |
Bit 6 |
Bit 5 |
Bit 4 |
Bit 3 |
Bit 2 |
Bit 1 |
Bit 0 |
|---|---|---|---|---|---|---|---|---|---|
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0x001E |
selfChk |
SC[7:0] | |||||||
Bits 7..0: SC[7:0] – Self-check period 0: No self check
1: Self check every 1 * 16 polling cycles
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255: Self check every 255 * 16 polling cycles
tempCal
The tempCal setting contains a 23-byte table for the XTAL temperature deviation. See RF Calibration for a functional description.
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Address |
Name |
Bit 7 |
Bit 6 |
Bit 5 |
Bit 4 |
Bit 3 |
Bit 2 |
Bit 1 |
Bit 0 |
|---|---|---|---|---|---|---|---|---|---|
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0x001F |
tempCal[0] |
tempCal_0[7:0] | |||||||
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0x0035 |
tempCal[22] |
tempCal_0[7:0] | |||||||
The temperature-dependent LO fractional frequency offset (FFRQoffset) caused by the temperature drift of the XTAL is compensated as follows:
The frequency deviation vis-à-vis the crystal temperature must be stored in the EEPROM. There are 23 bytes reserved in the variable tempCal[0:22] for this purpose. This results in a temperature value grid of 8 Kelvin, where tempCal[0] corresponds to -48°C and tempCal[22] to 128°C. Each tempCal byte contains the frequency deviation of the crystal for the defined temperature in ppm in two’s complement representation. The possible compensation range is thus, -128 ppm to +127 ppm for each temperature value.