5.12.2.4 Watchdog Trigger Register

A watchdog trigger is an 8-bit wide SPI pattern written to the WDTRIG register. A valid watchdog trigger event resets the Watchdog Timer.

Name:	WDTRIG
Offset:	0x20
Reset:	0x0
Property:	R/W


Bit	7	6	5	4	3	2	1	0
	WDTRIG [7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:0 – WDTRIG [7:0]

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The only valid trigger pattern is 0b01010101.

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