32.7.6 ADCLK

ADC Clock Selection Register
Name: ADCLK
Offset: 0xF57

Bit 76543210 
   ADCS[5:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 

Bits 5:0 – ADCS[5:0] ADC Conversion Clock Select bits

ValueDescription
n ADC Clock frequency = FOSC/(2*(n+1))