10.2.7.19 TCPC Device Capabilities 2 Register
| Name: | TCPC_DCP2 |
| Offset: | 0x26 |
| Reset: | 0x0000 |
| Property: | Read-only, Write-once |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| WDTMR | |||||||||
| Access | |||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SKDSCDET | STPDSCHTH | VBUSVALSB[1:0] | VCPSP[2:0] | VCOFC | |||||
| Access | |||||||||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 8 – WDTMR Watchdog Timer
| Value | Description |
|---|---|
| 0 | Enable Watchdog Timer not implemented. |
| 1 | Enable Watchdog Timer implemented. |
Bit 7 – SKDSCDET Sink Disconnect Detection
| Value | Description |
|---|---|
| 0 | VBUS_SINK_DISCONNECT_THRESHOLD not implemented (default: Use TCPC_PS.VBUS=0b to indicate a Sink disconnect). |
| 1 | VBUS_SINK_DISCONNECT_THRESHOLD implemented. |