2.1.2.7 Asynchronous Pipeline Register Reset

Each data output port has its own asynchronous reset. In Two-Port mode, A_DOUT_ARST_N and B_DOUT_SRST_N drive the asynchronous reset of the read data output pipeline registers (A_DOUT and B_DOUT) and ECC pipeline registers. If the asynchronous pipeline reset is driven low, the pipeline data output registers are immediately reset to zero, as shown in the following figure.