37.7.4 CVD Results POS FIFO Read Register

Name: CVDRESH
Offset: 0x010
Reset: 0x00000000
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
      POS[18:16] 
Access RRR 
Reset 000 
Bit 15141312111098 
 POS[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 POS[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 18:0 – POS[18:0]

The accumulated result of the positive-side measurements. The controller supports up to 128x oversampling; therefore, each polarity can accumulate up to 19 bits when using 12-bit ADC (actual number of bits = ADCBITS + 7). The accumulation is not shifted back down to create an average. Therefore, if oversampling was requested, the software will need to account for the left-shift of the result returned.