37.7.6 CVD Results Descriptor FIFO Read Register

Name: CVDRESD
Offset: 0x018
Reset: 0x00000000
Property: -

Bit 3130292827262524 
 TXINDEX[4:0] SDNUM[1:0] 
Access RRRRRRR 
Reset 0000000 
Bit 2322212019181716 
 RXINDEX[4:0] DELTA[17:16] 
Access RRRRRRR 
Reset 0000000 
Bit 15141312111098 
 DELTA[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 DELTA[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 31:27 – TXINDEX[4:0] Transmit Index of the result

If the Stride of the Scan Descriptor is more than one, the Transmit Index indicates the first one of the group.

Bits 25:24 – SDNUM[1:0] Scan Descriptor Number

These bits has the Scan Descriptor Number that generated the result.

Bits 23:19 – RXINDEX[4:0] Receive Index of the result

If the Stride of the Scan Descriptor is more than one, the Receive Index indicates the first one of the group.

Bits 17:0 – DELTA[17:0] Delta of the accumulated results of the negative-side and positive-side measurements

The controller supports up to 128x oversampling; therefore, each polarity can accumulate up to 19 bits when using 12-bit ADC. The accumulation is not shifted back down to create an average. Therefore, if oversampling was requested, the software will need to account for the results returned.

The DELTA presented is the 18 MSBs (including sign bit) of a signed subtraction of the two accumulators. The data will be in 2’s complement form if the delta is negative.

Width Needed: ADCBITS + 7 + 1 (sign)

Width available: 18

delta_pre[ADCBITS+7:0] = signed’( {1’b0, POS[ADCBITS+7-1:0]} - {1’b0, NEG[ADCBITS+7-1:0]} )

DELTA[17:0] = delta_pre[ADC_BITS+7:ADC_BITS+7-17]

Note: Reading this register increments the FIFO read pointer, destroying the data in the previous two registers for NEG and POS absolute values. If the NEG and POS values are desired, those registers must be read before this register. If the absolute values are not required, bandwidth can be saved by reading only this descriptor register.