40.8.36 SDHC e.MMC Control 1 Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | MC1R |
| Offset: | 0x204 |
| Reset: | 0x00 |
| Property: | R/W |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FCD | BOOTA | CMDTYP[1:0] | |||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bit 7 – FCD e.MMC Force Card Detect
When using e.MMC, the user can set this bit to 1 to bypass the card detection procedure using the SDHC_CD signal.
| Value | Name | Description |
|---|---|---|
| 0 | DISABLED | e.MMC Forced Card Detect is disabled. The SDHC_CD signal is used and debounce timing is applied. |
| 1 | ENABLED | e.MMC Forced Card Detect is enabled. |
Bit 5 – BOOTA e.MMC Boot Acknowledge Enable
This bit must be set according to the value of BOOT_ACK in the Extended CSD Register (refer to “Embedded MultiMedia Card (e.MMC) Electrical Standard 4.51” ).
When this bit is set to 1, the peripheral waits for boot acknowledge pattern from the e.MMC before receiving boot data.
If the boot acknowledge pattern is wrong, the BOOTAE status flag rises in SDHC_EISTR if BOOTAE is set in SDHC_EISTER. An interrupt is generated if BOOTAE is set in SDHC_EISIER.
If the no boot acknowledge pattern is received, the DATTEO status flag rises in SDHC_EISTR if DATTEO is set in SDHC_EISTER. An interrupt is generated if DATTEO is set in SDHC_EISIER.
Bits 1:0 – CMDTYP[1:0] e.MMC Command Type
| Value | Name | Description |
|---|---|---|
| 0 | NORMAL |
The command is not an e.MMC specific command. |
| 1 | WAITIRQ |
This bit must be set to 1 when the e.MMC is in Interrupt mode (CMD40). Refer to “Interrupt Mode” in the “Embedded MultiMedia Card (e.MMC) Electrical Standard 4.51” . |
| 2 | STREAM |
This bit must be set to 1 in the case of Stream Read(CMD11) or Stream Write (CMD20). Only effective for e.MMC up to revision 4.41. |
| 3 | BOOT |
Starts a Boot Operation mode at the next write to SDHC_CR. Boot data are read directly from e.MMC device. |