40.8.30 SDHC ADMA Error Status Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | AESR |
| Offset: | 0x54 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| LMIS | ERRST[1:0] | ||||||||
| Access | R | R | R | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bit 2 – LMIS ADMA Length Mismatch Error
This error occurs in the following two cases:
- While Block Count Enable (BCEN) is being set, the total data length specified by the Descriptor table is different from that specified by the Block Count (BLKCNT) and Transfer Block Size (BLKSIZE).
- The total data length cannot be divided by the Transfer Block Size (BLKSIZE).
| Value | Description |
|---|---|
| 0 |
No error |
| 1 |
Error |
Bits 1:0 – ERRST[1:0] ADMA Error State
This field indicates the state of ADMA when an error has occurred during an ADMA data transfer. This field never indicates 2 because ADMA never stops in this state.
| Value | Name | Description |
|---|---|---|
| 0x0 | ST_STOP (Stop DMA) | Points to the descriptor following the error descriptor |
| 0x1 | ST_FDS (Fetch Descriptor) | Points to the error descriptor |
| 0x2 | - | Reserved |
| 0x3 | ST_TRF (Transfer Data) | Points to the descriptor following the error descriptor |