35.6.7.1 Principles of Operation

The USART uses the following lines for data transfer:

  • RxD for receiving
  • TxD for transmitting
  • XCK/TE: XCK for the transmission clock in synchronous operation

    TE for the transmit Enable in RS-485 asynchronous operation

USART data transfer is frame based. A serial frame consists of: the following

  • 1 start bit
  • From 5 to 9 data bits (MSB or LSB first)
  • None, even, or odd parity bit
  • 1 or 2 stop bits

A frame starts with the Start bit followed by one character of Data bits. If enabled, the parity bit is inserted after the Data bits and before the first Stop bit. After the stop bits of a frame, either the next frame can follow immediately, or the communication line can return to the Idle (high) state. The receiver clock resynchronizes to the falling edge of each start bit. The following figure illustrates the possible frame formats. Brackets denote optional bits.

Figure 35-8. Frame Formats
StStart bit. Start bit is always active low.
n, [n]Frame Data is always 8-9 bits with only 5 to 9 significant bits determined by CHSIZE.
[P]Parity bit. Either odd or even
Sp, [Sp]Stop bit. Signal is always high (User selectable, one or two stop bits)
IDLERx/Tx data line is IDLE, logic high
Note: For character Data Bits sizes defined by, USART - CTRLA.CHSIZE, data bits sizes ≤ 8 bits, 8 bits are always transmitted. The significant bits defined by CHSIZE plus padded “0’s” in any remaining bits of the byte, (i.e., #padded “0” bits = (8 – CHSIZE bits)). If CHSIZE is 9 bits, then all 9 bits with no padded zeros make up the frame.