35.6.7.7 SERCOM USART LIN Host
Every LIN message has a specific structure: the first part being the token and the second part data (the Header and the Response). The token is always transmitted by the Host task, and is divided up into the sync break, the sync field, and the identifier (ID). The sync break and sync field are used to have all the Clients on the LIN bus synchronized to the Host timing (without the need of any crystal or oscillator), and the ID is what defines which Clients respond, receive, or ignore the message header being sent. The header in total consists of at least 13 bits for the SYNC break, 1 delimiter bit, 10 SYNC field bits (1 start bit, 8 bits for synchronization, and 1 stop bit), and 10 identifier bits (1 start bit, 6 bits for the identifier, 2 bits for parity, and 1 stop bit).
LIN Host is available with the following configuration:
- LIN Host format (CTRLA.FORM = 0x02)
- Asynchronous mode (CTRLA.CMODE = 0)
- 16x sample rate:
- Using arithmetic baud rate generation (CTRLA.SAMPR = 0) preferred or
- Using fractional baud rate generation (CTRLA.SAMPR = 1)
- LSB is transmitted first (CTRLA.DORD = 1)
- Break, sync, and ID identifier are automatically transmitted when DATA register is written with the identifier ID (CTRLB.LINCMD = 0x2)
- USART with internal clock (CTRLA.MODE = 0x1)
- 8 data bits (CTRLB.CHSIZE = 0x0)
LIN frames start with a header transmitted by the Host. The header consists of the break, sync, and identifier fields. After the Host transmits the header, the addressed client will respond with 1-8 bytes of data plus checksum.
Using the LIN command field (CTRLB.LINCMD), the complete header can be automatically transmitted, or software can control transmission of the various header components.
When CTRLB.LINCMD = 0x1, software controls transmission of the LIN header. In this case, software writes the Sync 0x55 and ID value to the DATA register using the following sequence:
- CTRLB.LINCMD is written to 0x1.
- The DATA register written with 0x00.
This triggers transmission of the break field by hardware. Note: Writing the DATA register with any value will also result in the transmission of the break field by hardware.
- The DATA register written with 0x55 when INTFLAG.DRE = 0. The 0x55 value (sync) is transmitted.
- The DATA register written with the “ID” identifier when INTFLAG.DRE = 0. The identifier is transmitted.
When CTRLB.LINCMD = 0x2, hardware controls transmission of the LIN header. In this case, software uses the following sequence:
- CTRLB.LINCMD is written with 0x2.
- The DATA register written with the “ID” identifier. This triggers transmission of the complete header by hardware. First the break field is transmitted. Next, the sync field is transmitted, and finally the “ID” identifier is transmitted.
- The recommended inductors must be a power line ferrite ≥ 680 Ω @ 100 MHz w/DCR ≤ 0.15 Ω.
- The TVS, Transient Voltage Suppressor, should be a Unidirectional Zener w/Reverse Standoff voltage ≥ 30V with a Peak Pulse current rating ≥ 7.5 amps.