35.6.7.5 SERCOM USART IrDA Modulation and Demodulation

Transmission and reception can be encoded IrDA compliant up to 115.2 kb/s. IrDA modulation and demodulation work in the following configuration:

  • IrDA encoding enabled (CTRLB.ENC=1)
  • Asynchronous mode (CTRLA.CMODE=0)
  • 16x over-sampling using arithmetic baud rate generation (CTRLA.SAMPR = 0)
  • USART frame w/no parity (CTRLA.FORM = 0x0)
  • USART with internal clock (CTRLA.MODE = 0x1)
  • TX Transmit Data Pinout CTRLA.TXPO = 0x0
  • RX Receive Data Pinout CTRLA.RXPO = 0x2,0x3

During transmission, each low bit is transmitted as a high pulse. The pulse width is 3/16 of the baud rate period, as illustrated in the following figure.

Figure 35-14. IrDA Transmit Encoding

The reception decoder has two main functions.

The first is to synchronize the incoming data to the IrDA baud rate counter. Synchronization is performed at the start of each zero pulse.

The second main function is to decode incoming Rx data. If a pulse width meets the minimum length set by configuration (RXPL.RXPL), it is accepted. When the baud rate counter reaches its middle value (1/2 bit length), it is transferred to the receiver.

Note: The polarity of the transmitter and receiver are opposite: During transmission, a ‘0’ bit is transmitted as a ‘1’ pulse. During reception, an accepted ‘0’ pulse is received as a ‘0’ bit.

Example: The following figure illustrates reception where RXPL.RXPL is set to (19). This indicates that the pulse width should be at least (20) SE serial engine GCLK_SERCOMn_CORE clock cycles. When using BAUD = 0xE666 or (160) GCLK_SERCOMn_CORE cycles per bit, this corresponds to 2/16 baud clock as minimum pulse width required. In this case the first bit is accepted as a ‘0’, the second bit is a ‘1’, and the third bit is also a ‘1’. A low pulse is rejected since it does not meet the minimum requirement of 2/16 baud clock.

Figure 35-15. IrDA Receive Decoding
Figure 35-16. IrDA Typical Use Case