35.6.7.11 Sleep Mode Operation
The behavior in Sleep mode is depending on the clock source and the Run Standby bit in the CTRLA.RUNSTDBY register:
| Clock Source | CTRLA. RUNSTDBY | Wake Up Source | Comment |
|---|---|---|---|
| Internal, GCLK_SERCOMx_CORE | 1 | Any Interrupt | Any interrupt can wake-up the device |
| External, XCK SERCOM PAD[1,3] | INTFLAG RXC | The Receive Complete interrupt(s) can wake-up the device | |
| Internal, GCLK_SERCOMx_CORE | 0 | INTFLAG RXC | Internal clock will be disabled, after any ongoing transfer is completed. The Receive Complete interrupt(s) can wake-up the device. |
| External, XCK SERCOM PAD[1,3] | None | External clock will be disconnected after any ongoing transfer is completed then all reception will be stopped. |
Important: As described in the
Start of Frame Detection section, it is recommended the user select a fast
start-up internal RC oscillator for the GCLK_SERCOMn_CORE clock for fast wake
from sleep mode if desired, otherwise the frame data from the initial Start-of-Frame
detection event may get corrupted and any succeeding frames until the oscillator clock
has started up and stable due to baud rate mismatch issues.