67.7.7 Crystal Oscillator Design Considerations

When choosing a crystal for the 32.768 kHz crystal oscillator or for the Main crystal oscillator, several parameters must be taken into account. Important parameters are as follows:

• Crystal Load Capacitance: the total capacitance loading the crystal, including the oscillator’s internal parasitics and the PCB parasitics, must match the load capacitance for which the crystal’s frequency is specified. Any mismatch in the load capacitance with respect to the crystal’s specification leads to inaccurate oscillation frequency.
• Crystal Drive Level: use only crystals with specified drive levels greater than the minimum recommended value. Applications that do not respect this criterion may damage the crystal.
• Crystal Equivalent Series Resistance (ESR): use only crystals with a specified ESR lower than the maximum specified value. In applications where this criterion is not respected, the crystal oscillator may not start.
• Crystal Shunt Capacitance: use only crystals with a specified shunt capacitance lower than the maximum specified value. In applications where this criterion is not respected, the crystal oscillator may not start.
• PCB Layout Considerations: to minimize inductive and capacitive parasitics associated with XIN, XOUT, XIN32, XOUT32 traces, it is recommended to minimize as much as possible their routing length. These traces must be kept away from noisy switching signals (clock, data, PWM, etc.). A good practice is to shield them with a quiet ground to avoid coupling to neighboring signals.