8.3.1 Supply Voltage

Table 8-3. Supply Voltage
Symbol		Min.	Typ. ✝	Max.	Units	Conditions
Supply Voltage
V_DD	3.3V	3.135	3.3	3.465	V
V_DD	5V	4.75	5	5.25	V
Slew Rate		—	—	1.5	V/µs	2.85V≤ V_DD ≤ 5.25V
V_DD Range for Operating the USB Voltage Regulator
V_DDUREG		3.9	—	V_{DD_MAX}	V	V_DDUREG = V_DD
Supply Voltage for the USB Transceiver
V_USB		—	3.3	—	V
Voltage on V_BUS Pin
V_BUS		2.85	3.0	3.15	V
Quiescent Input Current of the USB Regulator
I_Q		—	180	—	µA	USB regulator without load
Input Leakage on the Regulator Output (V_USB Pin)
I_VUSB	Sink current	—	-10	—	mA	This applies to the fault condition when the USB regulator output voltage is driven externally at or above V_{USB_SINK}
I_VUSB	Source Current	—	30	—	mA	3.9≤ V_DDU≤ V_{DD_MAX}
Sink Function Trigger Point
V_{USB_SINK}		—	6	—	%	Percentage above V_USB
RAM Data Retention⁽¹⁾
V_DR		2.85	—	—	V	Device in Power-Down mode
Power-on Reset Release Voltage
V_PORR		2.7	2.85	3.05	V
t_PORR		—	3	—	μs
Power-on Reset Re-Arm Voltage
V_PORR		—	2.85	—	V
t_PORR		—	2.7	—	μs
V_DD Rise Rate to Ensure Internal Power-on Reset Signal
S_VDD		0.05	—	—	V/ms
✝ Data in the “Typ.” column is specified at T_A = 25°C and V_DD = 3.3V unless otherwise noted. These parameters are not tested and are for design guidance only. Note: This is the limit to which V_DD can be lowered in a sleep mode without losing RAM data.

Figure 8-1. POR and PORR with Slow Rising V_DD

Note: When POR is low, the device is held in Reset.