8.3.5 I/O Pins

Table 8-7. General I/O Pins
SymbolDescriptionMin.Typ.✝ Max.UnitConditions
Input Low Voltage
VILI/O PINS:
IO5:IO0——0.2×VDDVINLVL selecting ST(1)
VBUS——0.9VINLVL selecting TTL(1)
with I2C levels——0.3×VDDV
RESET pin——0.2×VDDV
Input High Voltage
VIHI/O PINS
IO5:IO00.8×VDD——VINLVL selecting ST(1)
VBUS1.2——VINLVL selecting TTL(1)
with I2C levels0.7×VDD——V
RESET pin0.8 × VDD——V
Input Leakage Current(1)
IILI/O Pins—+/- 5+/- 125nAGND ≤ VPIN ≤ VDD,

pin at high-impedance, TA= 85°C

RESET pin(2)—+/- 50+/- 200nAGND ≤ VPIN ≤ VDD,

pin at high-impedance, TA= 85°C

Pull-up Current
IPUR—150200μAVDD = 3.3V, VPIN = GND
Output Low Voltage
VOLStandard I/O pins——0.6VIOL = 10 mA, VDD = 3.3V
Output High Voltage
VOHStandard I/O pinsVDD-0.7——VIOH = 6 mA, VDD = 3.3V
I/O Rise Time
tSRRising —22—ns
Falling —16—ns
Pin Capacitance
CIOI/O Pins—5—pF

✝ Data in the “Typ.” column is specified at TA = 25°C and VDD = 3.3V, unless otherwise specified. These parameters are not tested and are provided for design guidance only.

Note:
  1. The negative current is defined as the current sourced by the pin.
  2. The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages.

USB Pins

Table 8-8. USB Pin Specifications
SymbolDescriptionMin.Typ.✝ Max.UnitConditions
Input Leakage Current
IILUDInput leakage on USB data pins DM—+/- 5+/- 125nAGND ≤ VPIN ≤ VDD,

pin at high-impedance, TA= 85°C

Input leakage on USB data pins DP—+/- 5+/- 125nAGND ≤ VPIN ≤ VDD,

pin at high-impedance, TA= 85°C

I/O Rise Time
DP Rising —13—ns
DM Rising —13—ns
DP Falling —14—ns
DM Falling —14—ns
Input Capacitance
CUDInput capacitance on USB data pins DM—15100pFPin at high-impedance
Input capacitance on USB data pins DP—15100pFPin at high-impedance

✝ Data in the “Typ.” column is specified at TA = 25°C and VDD = 3.3V, unless otherwise specified. These parameters are not tested and are provided for design guidance only.

Note:
  1. The negative current is defined as the current sourced by the pin.
  2. The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages.