46.4.1.3 External Count with External Gate Mode

In this mode, the QEA/EXTCNT input is considered as an external count signal. If the GATEN bit (QEIxCON<2>) is set, and QEB/DIR/GATE = 0, the QEB/DIR/GATE input will inhibit the counter signal. If the GATEN bit is cleared, the gate signal does not affect the counter operation. The default count direction is positive. If the CNTPOL bit (QEIxCON<3>) is set, the count direction is negative. The following figure illustrates the timing diagram of an External Count with External Gate mode operation.