2.3.5.2.1 Timing Characteristics

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Table 2-66. LVDS Worst Military-Case Conditions: T_J = 125 °C, Worst-Case VCC = 1.425V, Worst-Case VCCFPGAIOBx = 2.3V Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Speed Grade	t_DOUT	t_DP	t_DIN	t_PY	Units
Std.	0.62	1.96	0.04	1.63	ns
–1	0.52	1.63	0.03	1.36	ns

Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 2-7 for derating values.

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