22.5 Error Source Control x
Refer to the Register Summary section for all available Error Source Control x registers.
These registers are locked when the ERRCTRL State (STATE) bit field in the Control A (ERRCTRL.CTRLA) register is anything other than CONFIG. An attempted write outside the CONFIG state will return a Bus Error response.
| Name: | ESCx |
| Offset: | 0x10 + x*0x01 [x=0..16] |
| Reset: | 0x82 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FLOAT | ERRLVL[1:0] | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 1 | 1 | 0 | ||||||
Bit 7 – FLOAT Float all I/O pins
Determines if the FLOAT bit in STATUSA is set automatically when an error is detected on channel n.
| Value | Name | Description |
|---|---|---|
| 0x0 | DISABLE | The Float I/O Pins (FLOAT) bit in the Status A (ERRCTRL.STATUSA) register is not automatically set when an error is reported on this channel |
| 0x1 | ENABLE | The FLOAT bit in STATUSA is automatically set when an error is reported on this channel. This value will always be used when ERRLVL = CRITICAL. |
Bits 1:0 – ERRLVL[1:0] Error Severity Level
The Severity Level associated with the error channel.
| Value | Name | Description |
|---|---|---|
| 0x0 | CRITICAL | Critical error |
| 0x1 | RESERVED | Reserved, decoded as CRITICAL |
| 0x2 | NONCRITICAL | Noncritical error (reset value) |
| 0x3 | NOTIFICATION | Notification error |