22.5.5 Reset Cause
| Name: | CAUSE |
| Offset: | 0x04 |
| Reset: | 0xXX |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CAUSE[4:0] | |||||||||
| Access | R | R | R | R | R | ||||
| Reset | x | x | x | x | x | ||||
Bits 4:0 – CAUSE[4:0] Reset Cause
Reading CAUSE returns the channel number that caused the Error Controller Reset. This bit field may report a channel configured to CRITICAL severity or a channel configured to NONCRITICAL severity escalated to CRITICAL due to a timeout from the timeout counter.
This register is reset only by a Power-On Reset (POR); other types of system reset have no effect.
