38.6.6 Scan Address
| Name: | SCANADR |
| Offset: | 0x05 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SCANADR[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 7:0 – SCANADR[7:0] Address Being Scanned
The contents of this register are undefined if the CRC Source (SRC) bit field configuration of the Control A (CRCSCAN.CTRLA) register is MANUAL.
The SCANADR register contains byte addresses, i.e., a scan of 32 words will cause SCANADR to increment by 64.