The Accumulator Test mode aids in diagnostics of the accumulator and the result formatting
hardware and can test the integrity of the logic. It is enabled by configuring the MODE
bitfield in the Command (ADCn.COMMAND) register to ACCTEST.
The Accumulator Test mode is used as follows:
Writing to the Sample (ADCn.SAMPLE)
register writes directly to the internal 16-bit accumulator
Writing to the Result (ADCn.RESULT)
register accumulates the 10 LSb of the written value in the internal 16-bit
accumulator
Reading the Result register will read the
internal 16-bit accumulator
Figure 41-6. Accumulator Test
Note:
If the Left Adjust (LEFTADJ) bit in the
Control F (ADCn.CTRLF) register is ‘1’, a value written to the Result
register will be left adjusted 6-SAMPNUM bits before accumulated.
One peripheral clock (CLK_PER) clock
cycle must be allowed between writing to the Result register and reading it back again.
This can be achieved by executing any instruction between the write and the read
operations, such as a NOP instruction.
