19.6.17 Channel ID
| Name: | CHID |
| Offset: | 0x3F |
| Reset: | 0x00 |
| Property: | – |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ID[4:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bits 4:0 – ID[4:0] Channel ID
This bit field controls the channel number that will be affected by the channel registers (CH*). Before reading or writing a channel register, the Channel ID bit field must be written first.
| Value | Name | Description |
|---|---|---|
| 0x00 | CHN0 | DMA Channel 0 |
| 0x01 | CHN1 | DMA Channel 1 |
| Other | — | Reserved |
