19.6.19 Channel Control B


Bit	31	30	29	28	27	26	25	24
							CMD[1:0]
Access							R/W	R/W
Reset							0	0


Bit	23	22	21	20	19	18	17	16
	TRIGACT[1:0]
Access	R/W	R/W
Reset	0	0


Bit	15	14	13	12	11	10	9	8
	TRIGSRC[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	LVL[2:0]			EVOE	EVIE	EVACT[2:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 25:24 – CMD[1:0] Software Command

This bit field controls the software commands. Refer to Channel Suspend and Channel Resume and Next Suspend Skip.

Note: This bit field is not enable-protected.

Value	Name	Description
0x0	NOACT	No action
0x1	SUSPEND	Channel suspend operation
0x2	RESUME	Channel resume operation
0x3	—	Reserved

Bits 23:22 – TRIGACT[1:0] Trigger Action

This bit field controls the trigger action used for a transfer.

Note: This bit field is enable-protected.

Value	Name	Description
0x0	BLOCK	One trigger required for each block transfer
0x1	—	Reserved
0x2	BEAT	One trigger required for each beat transfer
0x3	TRANSACTION	One trigger required for each transaction

Bits 15:8 – TRIGSRC[7:0] Trigger Source

This bit field controls the peripheral trigger which is source of the transfer. Refer to the Transfer Triggers and Actions section and Trigger Action (TRIGACT) bit field in the Channel Control B (CHCTRLB) register for details on trigger selection and trigger modes.

Value	Name	Description
0x00	DISABLE	Only software/event triggers
0x01	SERCOM0_RX	SERCOM0 Receive
0x02	SERCOM0_TX	SERCOM0 Transmit
0x03	SERCOM1_RX	SERCOM1 Receive
0x04	SERCOM1_TX	SERCOM1 Transmit
0x05	TC0_OVF	TC0 Overflow
0x06	TC0_MC0	TC0 Match or Capture Channel 0
0x07	TC0_MC1	TC0 Match or Capture Channel 1
0x08	TC1_OVF	TC1 Overflow
0x09	TC1_MC0	TC1 Match or Capture Channel 0
0x0A	TC1_MC1	TC1 Match or Capture Channel 1
0x0B	TC2_OVF	TC2 Overflow
0x0C	TC2_MC0	TC2 Match or Capture Channel 0
0x0D	TC2_MC1	TC2 Match or Capture Channel 1
0x0E	TCC0_OVF	TCC0 Overflow
0x0F	TCC0_MC0	TCC0 Match or Capture Channel 0
0x10	TCC0_MC1	TCC0 Match or Capture Channel 1
0x11	TCC0_MC2	TCC0 Match or Capture Channel 2
0x12	TCC0_MC3	TCC0 Match or Capture Channel 3
0x13	ADC_RESRDY	ADC Result Ready
0x14	ADC_SAMPRDY	ADC Sample Ready
0x15	DSU_DCC0	DSU Debug Communication Channel 0
0x16	DSU_DCC1	DSU Debug Communication Channel 1
0x17–0xFF	–	Reserved

Bits 7:5 – LVL[2:0] Channel Arbitration Level

This bit field controls the arbitration level used for the DMA channel, where a high level has priority over a low level. Refer to the Arbitration section for further details on arbitration schemes.

Note: This bit field is not enable-protected.

Value	Name	Description
0x0	LVL0	Channel priority level 0
0x1	LVL1	Channel priority level 1
0x2	LVL2	Channel priority level 2
0x3	LVL3	Channel priority level 3
Other	—	Reserved

Bit 4 – EVOE Channel Event Output Enable

This bit indicates if the Channel event generation is enabled. The event will be generated for every condition defined in the descriptor Event Output Selection (EVOSEL) bit field in the Block Transfer Control (BTCTRL) register.

This bit is available only for the lower-numbered DMA channels. Refer to the EVSYS – Event System chapter for details on event generators.

Value	Description
0	Channel event generation is disabled
1	Channel event generation is enabled

Bit 3 – EVIE Channel Event Input Enable

This bit is available only for the lower-numbered DMA channels. Refer to the EVSYS – Event System chapter for details on event users.

Value	Description
0	Channel event action will not be executed on any incoming event
1	Channel event action will be executed on any incoming event

Bits 2:0 – EVACT[2:0] Event Input Action

This bit field controls the event input action, as shown below. The action is executed only if the corresponding EVIE bit in the CHCTRLB register of the channel is set.

This bit is available only for the lower-numbered DMA channels. Refer to the EVSYS – Event System chapter for details on event generators.

Value	Name	Description
0x0	NOACT	No action
0x1	TRIG	Normal transfer and conditional transfer on strobe trigger
0x2	CTRIG	Conditional transfer trigger
0x3	CBLOCK	Conditional block transfer
0x4	SUSPEND	Channel suspend operation
0x5	RESUME	Channel resume operation
0x6	SSKIP	Skip next block suspend action
0x7	—	Reserved

Name:	CHCTRLB
Offset:	0x44
Reset:	0x00000000
Property:	PAC Write-Protection, Enable-Protected